View source for Alchemy (microarchitecture)

'''Alchemy''' is a family of ultra low power [[Engineering:Microprocessor#Embedded applications|embedded microprocessors]] originally designed by Alchemy Semiconductor for communication and media devices. Alchemy processors are [[System on a chip|SoC]]s integrating a CPU core, a memory controller, and a varying set of peripherals. All members of the family use the Au1 CPU core implementing the [[MIPS architecture#MIPS32/MIPS64|MIPS32]] instruction set by [[Company:MIPS Technologies|MIPS Technologies]].
== History ==
Alchemy Semiconductor was a [[Engineering:Fabless manufacturing|fabless]] [[Engineering:Semiconductor industry|semiconductor]] company based in {{wipe|Austin, Texas}}. Founded in 1999 with a seed investment by Cadence Design Systems it licensed the 32-bit MIPS architecture to design, develop, and market high performance, ultra low power SoCs for the Internet Edge Device market. Peripherals were licensed from third parties. The founding team included former members of [[Company:Digital Equipment Corporation|DEC]]'s Austin Research and Design Center working on the [[Engineering:StrongARM|StrongARM]] project, dissolved after DEC sold its microprocessors business to [[Company:Intel|Intel]]. In May 2000 Alchemy Semiconductor became an independent company.<ref name="AboutAlchemySemi"/>

Alchemy Semiconductor unveiled the first member of the family, the Au1000 processor, at the Embedded Processor Forum in San Jose, CA, on June 13, 2000,<ref name="Au1000-PR"/><ref name="EPF2000-Au1000"/> with limited customer sampling in February 2001 and availability in production quantities in Q2 of that year, followed in 2001 and 2002 by the Au1500 and Au1100.<!--The Au1100 was announced in April 2002, one can probably assume its design phase commenced well before AMD acquired Alchemy two months earlier, and there is a document "The Alchemy Au1100™ From AMD Internet Edge Processor Data Book", #2000-0001, revision 0.5, from April 2002 which resembles other Alchemy Semiconductor publications and still contains their address, URL, and phone numbers.-->

In February 2002 [[Company:Advanced Micro Devices|AMD]] acquired Alchemy in order to compete with [[Company:Intel|Intel]]'s ARM-based [[Engineering:XScale|XScale]] processors, successor to the StrongARM line. They expanded the family with the Au1550 Security Network Processor and the Au1200 processor optimized for [[Engineering:Portable media player|PMP]] applications, as well as the Am1772 wireless chipset consisting of the Am1770 transceiver and Am1771 integrated baseband/MAC chips.<!--Am1772 Product Brief, AMD Publ. #28096, see also archived website.--> In Summer 2006 AMD sold its Alchemy assets to Raza Microelectronics, later renamed [[Company:RMI Corporation|RMI Corporation]]. This company introduced the Au1210 and Au1250, based on and pin-compatible with the Au1200, and finally in 2009 the Au1300 series integrating a graphics processor. RMI merged with [[Company:NetLogic Microsystems|NetLogic Microsystems]] in late 2009,<ref name="RMI-NetLogic"/> itself acquired by [[Company:Broadcom|Broadcom Corporation]] in February 2012.<ref name="NetLogic-Broadcom"/> Broadcom continued to sell Alchemy processors, if only under long term availability obligations, until at least 2017.<!--Broadcom Product Obsolescence Notification EOL-CCX-42972-146-0, August 25, 2017, pertaining to certain Au13xx models.-->

== Au1 CPU core ==
The Au1 CPU core designed by Alchemy implements the MIPS32 ISA Release 1 and supports the MIPS EJTAG interface. A [[Floating-point arithmetic|floating-point]] unit is not present, FP instructions generate an exception and can be emulated by software. Code compression (MIPS16) and the optional Supervisor Mode were also omitted. Virtual address translation is [[Translation lookaside buffer|TLB]]-based and relies on a fast exception handler rather than a hardware table walker. The core supports eight interrupt sources with prioritization by software. It has two low power modes where the clocks to all core units are stopped, one mode exempting the data cache to maintain cache coherency with the rest of the system.

Au1 is a scalar, in-order microarchitecture with a [[Classic RISC pipeline|classic five stage RISC pipeline]] enhanced by several optimizations. It includes a 16&nbsp;KiB, 4-way set associative instruction cache, a 16&nbsp;KiB, 4-way, write-back, read-allocate data cache, a register file, a write buffer, and a 16/32-bit multiply-accumulate unit and 1 bit/cycle hardware divider. The cache supports prefetching by software, locking of cache lines, and a streaming mode. All pipeline stages complete in one cycle when data is available, and all pipeline hazards and dependencies are enforced by hardware interlocks. A few instructions require multiple cycles.<ref name="EPF2000-Au1000"/><ref name="HC12-Au1000"/><ref name="30360-D-Au1000-DB"/>

== Alchemy SoC ==
The Au1000 SoC is rated for core frequencies up to 500&nbsp;MHz. At 400&nbsp;MHz it operates at 1.5&nbsp;V and the chip consumes no more than 500&nbsp;mW, with a performance of over 900 [[Dhrystone|Dhrystone-2.1]] MIPS/Watt according to Alchemy Semiconductor. Au1000 and Au1500 processors were fabricated on a [[Company:TSMC|TSMC]] 180&nbsp;nm LV logic 1.5V/3.3V 1P6M process, the Au1100 reduced power consumption further with a TSMC 130&nbsp;nm process.<ref name="HC12-Au1000"/><ref name="HC14-Au1x00"/> Manufacturing details of later models were not disclosed.

The CPU core, the integrated memory controllers and peripherals are linked by an internal 32-bit system bus (SBUS) running at up to one half of the CPU core frequency. Slower non-bus master capable peripherals are attached with an ancillary peripheral bus. The core's data cache snoops the SBUS for coherency with other bus masters, e.g. a DMA engine. Au12xx models integrate a 64-bit side bus (RBUS) for peripherals requiring more bandwidth from the memory controller.<ref name="32785-A-Au1200-PSA-WP"/> Au13xx models have one RBUS per memory channel.<ref name="Au1300-PB"/>

All Alchemy processors integrate a [[Dynamic random-access memory|DRAM]] controller, a static bus controller, an 8-channel DMA controller for data transfers between memory and peripherals, interrupt controllers, timers, and a power management unit. The static bus controller supports [[Static random-access memory|SRAM]], [[Read-only memory|ROM]], [[Flash memory|NAND/NOR Flash]] (Au1550), page mode Flash/ROM, [[Engineering:PC Card|PCMCIA]]/[[CompactFlash]] devices, and I/O peripherals such as an external LCD controller, [[Engineering:Parallel ATA#IDE and ATA-1|IDE]] PIO mode up to ≈80&nbsp;Mbit/s (Au12xx), or ATA-6/UDMA mode 5 (Au13xx). Au1550 and later processors have a more flexible 16-channel descriptor-based DMA controller. The Au1550 integrates a [[Company:SafeNet|SafeNet]] Security Engine providing an entropy-based random number generator and accelerating the [[Engineering:Data Encryption Standard|DES]], 3DES, [[Advanced Encryption Standard|AES]], and [[RC4]] encryption algorithms, and the [[MD5]] and [[SHA-1]] hash algorithms.

Au1100 processors integrate an [[Engineering:Liquid-crystal display|LCD]] controller which supports panels up to 800 × 600 pixels with 16 bit color depth. The LCD controller of Au12xx processors supports up to 2K resolution and up to 24 bits per pixel, four overlay windows, alpha blending, and gamma correction. The Camera Interface Module pins out an [[Engineering:ITU-R BT.656|ITU-R BT.656]] compatible 8/9/10-bit bus running at up to 33&nbsp;MHz, and supports UYVY ([[Chroma subsampling#4:2:2|YUV 4:2:2]]) and [[Engineering:Bayer filter|Bayer RGB]] to planar format conversion. The Media Acceleration Engine accelerates video decoding and supports the formats [[Moving Picture Experts Group|MPEG-1/2/4]], [[Software:DivX|DivX-3/4/5]], [[H.263]], and [[Windows Media Video|WMV 9/VC-1]] at resolutions up to 720 × 576. It supports hardware colorspace conversion and image scaling with a 4-tap filter, also for the CIM. The MAE2 peripheral of Au13xx processors adds support for the [[Advanced Video Coding|H.264]] and [[JPEG]] standards, hardware bit stream decoding, and resolutions up to 720p. The Graphics Processing Engine available on some Au13xx processors is an [[Mali (GPU)|ARM Mali-200]] and accelerates 2D and 3D graphics compatible with [[Software:OpenVG|OpenVG]] 1.1 and OpenGL ES 1.1 and 2.0.

Each member of the family was available with different core frequency and hence power ratings, commercial and industrial temperature ranges, in a [[Chemistry:Restriction of Hazardous Substances Directive|Pb-free]] or (earlier models) standard package. A low profile, fine pitch plastic ball grid array (LF-PBGA) package was used for all models, with ball counts from 324 (Au1000) to 537 (Au13xx), pitch 0.65&nbsp;mm to 1.0&nbsp;mm, and package size 17&nbsp;mm × 17&nbsp;mm × 1.7&nbsp;mm to 23&nbsp;mm × 23&nbsp;mm × 1.5&nbsp;mm.

== Alchemy Processor Family ==
{|class="wikitable" style="text-align: center"
! rowspan=2 | Series<!--Not a part number, that would be something like AU1350-667MTDA2 (Au1350 processor, 667 MHz core, package type MT, comm. temp. range, Pb-free, A2 stepping).-->
! rowspan=2 | Launch
! rowspan=2 | Core frequ. ([[Hertz|MHz]])
! rowspan=2 | [[Thermal design power|TDP]] ([[Watt|mW]])
! rowspan=2 | [[Dynamic random-access memory|DRAM]]
! rowspan=2 | Static Bus
! colspan=12 | Integrated Peripherals
! rowspan=2 | Datasheet
! rowspan=2 | Notes
|-
! [[Engineering:Peripheral Component Interconnect|PCI]]
! [[Engineering:Liquid-crystal display|LCD]]
! {{Abbr|GPE|Graphics Processing Engine}}
! {{Abbr|CIM|Camera Interface Module}}
! {{Abbr|MAE|Media Acceleration Engine}}
! Hardware de/encrypt.
! [[Engineering:USB|USB]] host ports
! USB device port
! [[Ethernet]]
! [[Engineering:SD card|SD card]]
! Low speed busses
! GPIOs max.
|-
! colspan=22 style="text-align: left" | by '''Alchemy Semiconductor''' (2000–2002)
|-
| Au1000
| 2000-06-13<ref name="Au1000-PR"/> (announced)<br/>2001-Q2 (available)
| 266-500
| 300-900 typ.
| rowspan="2" | 32-bit SDR-133
| rowspan="3" | 32-bit data/address
| - || - || - || - || - || -
| 2 × 1.1 || 1.1 || 2 × 10/100 || -
| [[Engineering:AC'97|AC'97]], [[I²S]], [[Organization:Infrared Data Association|IrDA]], 2&nbsp;×&nbsp;[[Synchronous Serial Interface|SSI]], 4&nbsp;×&nbsp;UART || 32
| <ref name="30360-D-Au1000-DB"/><ref name="27348-E-Au1000-SU"/>
| <!--notes-->
|-
| Au1500
| 2001-06-11<ref name="Au1500-PR"/> (announced)<br/>2001-12 (available)
| 333-500
| 400-1200 typ.
| 2.2, 32 bit, 33/66&nbsp;MHz || - || - || - || - || -
| 2 × 1.1 || 1.1 || 2 × 10/100 || -
| AC'97, 2&nbsp;×&nbsp;UART || 39
| <ref name="30361-D-Au1500-DB"/><ref name="27362-E-Au1500-SU"/>
| <!--notes-->
|-
| Au1100<!--Not really by AMD, see remark above.-->
| 2002-04-08<ref name="Au1100-PR"/> (announced)
| 333-500
| 200-400 typ.
| 32-bit SDR-133 2.5V/3.3V
| - || v1 || - || - || - || -
| 2 × 1.1 || 1.1 || 1 × 10/100 || 2&nbsp;×&nbsp;1.1
| AC'97, I²S, IrDA, 2&nbsp;×&nbsp;SSI, 3&nbsp;×&nbsp;UART || 48
| <ref name="30362-D-Au1100-DB"/><ref name="27353-E-Au1100-SU"/>
| <!--notes-->
|-
! colspan=22 style="text-align: left" | by [[Company:Advanced Micro Devices|AMD]] (2002–2006)
|-
| Au1550
| 2004-02-24<ref name="Au1550-PR"/> (announced)
| 333-500
| 400-600 typ., 1460 max.
| 16/32-bit SDR-166/<br/>DDR-400
| 32-bit data, 29-bit addr.
| 2.2, 32 bit, 33/66&nbsp;MHz
| - || - || - || - || Security Engine
| 2 × 1.1 || 1.1 OTG || 2 × 10/100 || 2&nbsp;×&nbsp;1.1
| 4&nbsp;×&nbsp;PSC,<ref group="lower-alpha" name="PSC"/> 3&nbsp;×&nbsp;UART || 43
| <ref name="30283-D-Au1550-DB"/>
| <!--notes-->
|-
| Au1200
| 2005-01-03<ref name="Au1200-PR"/>
| 333-500
| 1600 max.
| 16/32-bit DDR-400/<br/>DDR2-533
| 16-bit data,<br/>15/30-bit addr.<ref group="lower-alpha" name="Static15"/>
| - || v2 || - || v1 || v1 || [[Advanced Encryption Standard|AES]]-128
| 1 × 2.0 || 2.0 OTG || - || 2 × 1.1
| 4&nbsp;×&nbsp;PSC,<ref group="lower-alpha" name="PSC"/> 2&nbsp;×&nbsp;UART || 48
| <ref name="32798-E-Au1200-DB"/>
| <!--notes-->
|-
! colspan=22 style="text-align: left" | by [[Company:RMI Corporation|RMI]] (2006–2009), [[Company:NetLogic Microsystems|NetLogic]] (2009–2011), [[Company:Broadcom|Broadcom]] (2011–current)
|-
| Au1210
| rowspan="2" | 2007-01-09 (announced)<br/>2007-06 (available)
| 333-400
| 360-420 typ., 1000 max.
| rowspan="2" | 16/32-bit DDR-400/<br/>DDR2-533
| rowspan="2" | 16-bit data,<br/>15/30-bit addr.<ref group="lower-alpha" name="Static15"/>
| rowspan="2" | <!--PCI-->-
| rowspan="2" | <!--LCD-->v2
| rowspan="2" | <!--GPE-->-
| rowspan="2" | <!--CIM-->v1
| rowspan="2" | <!--MAE-->v1
| <!--hw de/encrypt-->- || 1 × 2.0 || 2.0 OTG || - || 2 × 1.1
| rowspan="2" | 4&nbsp;×&nbsp;PSC,<ref group="lower-alpha" name="PSC"/> 2&nbsp;×&nbsp;UART
| rowspan="2" | <!--GPIOs-->48
| rowspan="2" | <ref name="Au1210-Au1250-DB"/>
| <!--notes-->
|-
| Au1250
| 400-700<ref name="Au1210-Au1250-DB"/><ref name="NetLogic-ULPP"/>
| 560-580 typ., 1400 max.
| AES-128 || 1 × 2.0 || 2.0 OTG || - || 2 × 1.1
| <ref group="lower-alpha" name="CDR-King"/>
|-
| Au1310
| rowspan="6" | 2009-01<ref name="Au1300-PR"/> (announced)
| 533
| <!--TDP-->
| rowspan="6" | 2 × 16-bit DDR2-667
| rowspan="6" | 16-bit data,<br/>15/30-bit addr.<ref group="lower-alpha" name="Static15"/><!--Based on pinout.-->
| rowspan="6" | <!--PCI-->-
| rowspan="6" | <!--LCD-->v2?
| <!--GPE-->-
| rowspan="6" | <!--CIM-->v2
| rowspan="6" | <!--MAE-->v2
| <!--hw de/encrypt-->-
| rowspan="6" | <!--USB host-->1 × 2.0
| rowspan="6" | <!--USB dev-->2.0 OTG
| rowspan="6" | <!--Eth-->-
| rowspan="6" | <!--SD-->3 × ?, one port supporting 8-bit eMMC 4.3
| rowspan="6" | 4&nbsp;×&nbsp;PSC,<ref group="lower-alpha" name="PSC"/> 4&nbsp;×&nbsp;UART
| rowspan="6" | <!--GPIOs-->75
| rowspan="6" | <ref name="Au1300-PB"/><!--Author failed to unearth the Au1300 data book, information from the Au1300 product brief was augmented with numbers gleaned from the Broadcom website and Mouser.-->
| <!--notes-->
|-
| Au1320 || 667 || <!--TDP--> || {{Chk}} || ? || <!--notes-->
|-
| Au1340 || 533-667 || || - || - ||
|-
| Au1350/Au1354 || 533-800 || || {{Chk}} || AES-128 ||
|-
| Au1370/Au1374 || 667-800 || || - || - ||
|-
| Au1380/Au1384 || 667-1000 || || {{Chk}} || AES-128 ||
|}
<references group="lower-alpha">
<ref name="PSC">Programmable Serial Controller configurable as [[Engineering:AC'97|AC'97]], [[I²S]], [[Serial Peripheral Interface|SPI]], [[System Management Bus|SMBus]] interface.</ref>
<ref name="Static15">15-bit address bus, 30 bit with an external latch.</ref>
<ref name="CDR-King">Used in [https://web.archive.org/web/20190321193916/http://www.cdrking.com/?mod=products&type=view&sid=9821&main=166 CD-R King notebooks].</ref>
</references>

== Applications ==
Alchemy processors were marketed for wireless [[Engineering:Gateway (telecommunications)|gateways]] and [[Wireless access point|access points]]; [[Engineering:Voice over IP|VoIP]], [[Earth:Navigation system|navigation]], and [[Network-attached storage|NAS]] devices; [[Engineering:Set-top box|STB]]s, thin clients, portable and automotive TV and [[Engineering:Portable media player|media players]], and [[Digital photo frame|digital photo frame]]s.

Examples are the [[Engineering:Sun Ray|Sun Ray 2]] family of [[Thin client|thin client]]s., Several [[Company:Cowon|Cowon]] [[Engineering:Portable media player|PMP]] devices, [[Company:Dell|Dell]] DRAC5 remote administration cards, [[Engineering:AirPort|AirPort]] Extreme Base Station, embedded products for networking by [[Company:Sun Microsystems|Sun Microsystems]]; 4G Systems MTX-1 AccessCube MeshCube

== References ==
<references>
<ref name="AboutAlchemySemi">{{cite web|url=http://www.insidechips.com/public/3203print.cfm|title=About Alchemy Semiconductor|archive-url=https://web.archive.org/web/20141107140122/http://www.insidechips.com/public/3203print.cfm|archive-date=2014-11-07}}</ref>
<ref name="RMI-NetLogic">{{cite press release|date=2009-10-23|title=NetLogic Microsystems Announces Stockholder Approval Required for Acquisition of RMI Corporation|publisher=[[Company:NetLogic Microsystems|NetLogic Microsystems]]|url=http://www.netlogicmicro.com:80/News/pr/2009/09-10-23.htm|url-status=dead|archive-url=https://web.archive.org/web/20100330104024/http://www.netlogicmicro.com:80/News/pr/2009/09-10-23.htm|archive-date=2010-03-30}}</ref>
<ref name="NetLogic-Broadcom">{{Cite news|url=https://www.reuters.com/article/us-broadcom-idUSTRE78B23T20110912|title=Chipmaker Broadcom to buy NetLogic for $3.7 billion|date=2016-09-12|newspaper=Reuters|access-date=2017-01-04}}</ref>
<ref name="EPF2000-Au1000">{{cite conference|url=http://www.alchemysemi.com:80/powerpoint/EPF_Final_No_Animation.ppt |archive-url=https://web.archive.org/web/20000918034051/http://www.alchemysemi.com:80/powerpoint/EPF_Final_No_Animation.ppt |archive-date=2000-09-18 |title=Au1000 Internet Edge Processor - A High Performance / Low Power MIPS SOC|last1=Hoeppner|first1=Greg|date=2000-06-13|publisher=Alchemy Semiconductor|conference=Embedded Processor Forum 2000}}</ref>
<ref name="HC12-Au1000">{{cite conference|url=https://hc12.hotchips.org|title=The Au1000™ Internet Edge Processor: A High Performance, Low Power SOC|last1=Plummer|first1=Suzanne|date=2000-08-13|conference=Hot Chips 12}}</ref>
<ref name="HC14-Au1x00">{{cite conference|url=https://hc14.hotchips.org|title=Alchemy Au1x00|last1=Bassett|first1=Paul|date=2002-08-19|conference=Hot Chips 14}}</ref>
<ref name="30360-D-Au1000-DB">{{cite book|date=September 2005|title=AMD Alchemy™ Au1000™ Processor Data Book|publisher=[[Company:Advanced Micro Devices|AMD]]|url=http://www.razamicroelectronics.com/pub_assets/30360D_au1000_databook.pdf|url-status=dead|archive-url=https://web.archive.org/web/20061015230659/http://www.razamicroelectronics.com/pub_assets/30360D_au1000_databook.pdf|archive-date=2006-10-15|access-date=2022-04-27}}</ref>
<ref name="27348-E-Au1000-SU">{{cite book|date=June 2005|title=AMD Alchemy™ Au1000™ Processor Specification Update|url=https://en.wikichip.org/wiki/File:AMD-27348-E_Au1000_Spec_Update.pdf}}</ref>
<ref name="30362-D-Au1100-DB">{{cite book|date=April 2006|title=AMD Alchemy™ Au1100™ Processor Data Book|publisher=[[Company:Advanced Micro Devices|AMD]]|url=http://www.amd.com/files/connectivitysolutions/aufamily/au1100/30362D_au1100_databook.pdf|url-status=dead|archive-url=https://web.archive.org/web/20061020095828/http://www.amd.com/files/connectivitysolutions/aufamily/au1100/30362D_au1100_databook.pdf|archive-date=2006-10-20|access-date=2022-04-27}}</ref>
<ref name="27353-E-Au1100-SU">{{cite book|date=June 2005|title=AMD Alchemy™ Au1100™ Processor Specification Update|url=https://en.wikichip.org/wiki/File:AMD-27353-E_Au1100_Spec_Update.pdf}}</ref>
<ref name="32798-E-Au1200-DB">{{cite book|date=February 2006|title=AMD Alchemy™ Au1200™ Processor Data Book|publisher=[[Company:Advanced Micro Devices|AMD]]|url=http://www.razamicroelectronics.com/pub_assets/32798e_Au1200_ds.pdf|url-status=dead|archive-url=https://web.archive.org/web/20061015230051/http://www.razamicroelectronics.com/pub_assets/32798e_Au1200_ds.pdf|archive-date=2006-10-15|access-date=2022-04-27}}</ref>
<ref name="32785-A-Au1200-PSA-WP">{{cite book|last1=Eno|first1=Jim|date=2005|title=White Paper: AMD Alchemy™ Au1200™ Processor System Architecture|publisher=[[Company:Advanced Micro Devices|AMD]]|url=http://www.amd.com/files/connectivitysolutions/aufamily/au1200/32785a_au1200sysarch_wpaper.pdf|url-status=dead|archive-url=https://web.archive.org/web/20051223152802/http://www.amd.com/files/connectivitysolutions/aufamily/au1200/32785a_au1200sysarch_wpaper.pdf|archive-date=2005-12-23|access-date=2022-04-27}}</ref>
<ref name="Au1210-Au1250-DB">{{cite book|date=April 2007|title=RMI Alchemy™ Au1210™ Navigation Processor and Au1250™ Media Processor Data Book|publisher=[[Company:RMI Corporation|RMI]]|url=https://en.wikichip.org/wiki/File:RMI-Au1210-Au1250-DB.pdf}}</ref>
<ref name="Au1300-PB">{{cite book|date=December 2008|title=Product Brief: RMI Alchemy™ Au1300™ Media Processor Series|publisher=[[Company:RMI Corporation|RMI]]|url=https://en.wikichip.org/wiki/file=RMI-Au1300-PB.pdf}}</ref>
<ref name="NetLogic-ULPP">{{cite web|url=http://www.netlogicmicro.com/Products/ProductBriefs/Alchemy/ULPP%20Guide.htm|title=NetLogic Microsystems Low-Power Embedded Processors Solution and Product Selection Guide|publisher=[[Company:NetLogic Microsystems|NetLogic Microsystems]]|archive-url=https://web.archive.org/web/20101213050823/http://www.netlogicmicro.com/Products/ProductBriefs/Alchemy/ULPP%20Guide.htm|archive-date=2010-12-13}}</ref>
<ref name="30361-D-Au1500-DB">{{cite book|date=March 2006|title=AMD Alchemy™ Au1500™ Processor Data Book|publisher=[[Company:Advanced Micro Devices|AMD]]|url=http://www.razamicroelectronics.com/pub_assets/30361D_au1500_db.pdf|url-status=dead|archive-url=https://web.archive.org/web/20061015230435/http://www.razamicroelectronics.com/pub_assets/30361D_au1500_db.pdf|archive-date=2006-10-15|access-date=2022-04-27}}</ref>
<ref name="27362-E-Au1500-SU">{{cite book|date=June 2005|title=AMD Alchemy™ Au1500™ Processor Specification Update|url=https://en.wikichip.org/wiki/File:AMD-27362-E_Au1500_Spec_Update.pdf}}</ref>
<ref name="30283-D-Au1550-DB">{{cite book|date=May 2006|title=AMD Alchemy™ Au1550™ Security Network Processor Data Book|publisher=[[Company:Advanced Micro Devices|AMD]]|url=http://www.amd.com/files/connectivitysolutions/aufamily/au1550/30283D_Au1550_db.pdf|url-status=dead|archive-url=https://web.archive.org/web/20060708150440/http://www.amd.com/files/connectivitysolutions/aufamily/au1550/30283D_Au1550_db.pdf|archive-date=2006-07-08|access-date=2022-04-27}}</ref>
<ref name="Au1000-PR">{{cite press release|date=2000-06-13|title=Alchemy Semiconductor unveils Au1000 Internet Edge processor|url=http://www.alchemysemi.com/press/in_the_news/EDN_6_13_2000.html|url-status=dead|location=Embedded Processor Forum, San Jose, CA|publisher=Alchemy Semiconductor|archive-url=https://web.archive.org/web/20010309104659/http://www.alchemysemi.com/press/in_the_news/EDN_6_13_2000.html|archive-date=2001-03-09}}</ref>
<ref name="Au1500-PR">{{cite press release|date=2001-06-11|title=Alchemy Semiconductor Expands Low Power, High Performance Chip Portfolio With Advent of Alchemy Au1500|url=http://www.alchemysemi.com:80/press/press_releases/01_06_11_au1500_release.html|url-status=dead|location=Embedded Processor Forum, San Jose, CA|publisher=Alchemy Semiconductor|archive-url=https://web.archive.org/web/20011216070321/http://www.alchemysemi.com:80/press/press_releases/01_06_11_au1500_release.html|archive-date=2001-12-16}}</ref>
<ref name="Au1100-PR">{{cite press release|date=2002-04-08|title=Innovative Alchemy™ Au1100™ Processor From AMD Sets New Standard For Mobile Internet Appliance Market|url=http://www.amd.com/us-en/Corporate/VirtualPressRoom/0,,51_104_543_8001~19047,00.html|url-status=dead|location=Sunnyvale, CA|publisher=[[Company:Advanced Micro Devices|AMD]]|archive-url=https://web.archive.org/web/20061020093749/http://www.amd.com/us-en/Corporate/VirtualPressRoom/0,,51_104_543_8001~19047,00.html|archive-date=2006-10-20}}</ref>
<ref name="Au1550-PR">{{cite press release|date=2004-02-24|title=AMD Introduces The AMD Alchemy™ Au1550™ Processor Delivering Integrated Secure Network Processing Power|url=http://www.amd.com/us-en/Corporate/VirtualPressRoom/0,,51_104_543_12605~82638,00.html|url-status=dead|location=RSA Conference, San Francisco, CA|publisher=[[Company:Advanced Micro Devices|AMD]]|archive-url=https://web.archive.org/web/20060528024627/http://www.amd.com/us-en/Corporate/VirtualPressRoom/0,,51_104_543_12605~82638,00.html|archive-date=2006-05-28}}</ref>
<ref name="Au1200-PR">{{cite press release|date=2005-01-03|title=AMD Introduces the AMD Alchemy™ Au1200™ Processor, Forges New Era of Portable Multimedia|url=http://www.amd.com/us-en/Corporate/VirtualPressRoom/0,,51_104_543_13743~93074,00.html|url-status=dead|location=Sunnyvale, CA|publisher=[[Company:Advanced Micro Devices|AMD]]|archive-url=https://web.archive.org/web/20060315211729/http://www.amd.com/us-en/Corporate/VirtualPressRoom/0,,51_104_543_13743~93074,00.html|archive-date=2006-03-15}}</ref>
<ref name="Au1300-PR">{{cite press release|date=2009-01-13|title=RMI Launches Alchemy Au1300 Processor Line|url=http://satellite.tmcnet.com/news/2009/01/14/3913483.htm}}</ref>
</references>

== External links ==
* {{Webarchive|url=https://web.archive.org/web/20000816094552/http://www.alchemysemi.com:80/|title=Alchemy Semiconductor website}}
* {{Webarchive|url=https://web.archive.org/web/20060203023239/http://www.amd.com/us-en/ConnectivitySolutions/ProductInformation/0,,50_2330_6625,00.html|title=AMD Alchemy™ Solutions Processor Family}}
* {{Webarchive|url=https://web.archive.org/web/20060710035423/http://www.razamicroelectronics.com:80/|title=Raza Microelectronics website}}
* {{Webarchive|url=https://web.archive.org/web/20080210001717/http://www.rmicorp.com:80/|title=RMI Corp. website}}
* {{Webarchive|url=https://web.archive.org/web/20101214233835/http://www.netlogicmicro.com/Products/Alchemy/index.asp|title=Alchemy on the NetLogic website}}
* [http://www.linux-mips.org/wiki/Alchemy Alchemy] {{Webarchive|url=https://web.archive.org/web/20090303231220/http://www.linux-mips.org/wiki/Alchemy |date=2009-03-03 }} page at linux-mips.org

{{AMD processors}}
{{MIPS microprocessors}}

{{DEFAULTSORT:Alchemy}}
[[Category:MIPS implementations]]
[[Category:Microarchitectures]]

{{Sourceattribution|Alchemy (microarchitecture)|1}}