Biography:John P. Hayes
John Patrick Hayes is an Irish-American computer scientist and electrical engineer, the Claude E. Shannon Chair of Engineering Science at the University of Michigan.[1] He supervised over 35 doctoral students, coauthored seven books and over 340 peer-reviewed publications.[2] His Erdös number is 2.
John P. Hayes | |
---|---|
Nationality | American |
Alma mater | University of Illinois at Urbana–Champaign |
Known for | a computer architecture textbook; research in circuit testing, quantum and stochastic computing |
Awards | IEEE Computer Society Test Technology Technical Community Lifetime Contribution Medal |
Scientific career | |
Fields | Computer Science |
Institutions | University of Michigan |
Doctoral advisor | Gernot Albert Metze |
Doctoral students | Shawn Blanton, Krishnendu Chakrabarty |
Biography
Hayes was born and grew up in Newbridge, Ireland[3] and did his undergraduate studies at the National University of Ireland, Dublin, graduating in 1965. He went on to graduate studies at the University of Illinois at Urbana–Champaign, earning a master's degree in 1967 and a Ph.D. in 1970.[4] He was responsible for the logic design of the input-output channel control units of ILLIAC III.[2] After working in The Hague for Shell for two years, he returned to academia, taking a faculty position at the University of Southern California in 1972. In 1979 Hayes was a Visiting Associate Professor at Stanford. He moved to Michigan in 1982, where he was the founding director of the Advanced Computer Architecture Laboratory.[1] Hayes retired from University of Michigan in 2023.[2]
Research
Hayes is the author of the books
- Digital System Design and Microprocessors (McGraw-Hill, 1984, ISBN:0-07-027367-7)
- Introduction to Digital Logic Design (Addison-Wesley, 1993, ISBN:978-0-201-15461-0)
- Computer Architecture and Organization (3rd ed., McGraw-Hill, 2002, ISBN:978-0-07-286198-3)
- Quantum Circuit Simulation (with George F. Viamontes and Igor L. Markov, Springer, 2009, ISBN:978-90-481-3064-1)
- Design, Analysis and Test of Logic Circuits Under Uncertainty, (with Smita Krishnaswamy and Igor L. Markov, Springer, 2012, ISBN:978-90-481-9643-2)
Hayes has written extensively on the use of hypercube graphs in supercomputing,[5] [6] [7] He has also written highly cited research papers on fault-tolerant design,[8] reversible computing,[9] and stochastic computing.[10]
Awards and honors
Hayes became an IEEE Fellow in 1985 "for contributions to digital testing techniques and to switching theory and logical design",[11] and an ACM Fellow in 2001 "for outstanding contributions to logic design and testing and to fault-tolerant computer architecture."[12] In 2004, the University of Illinois Urbana-Champaign department of electrical and computer engineering gave him their distinguished alumni award.[4]
In 2013, the IEEE Computer Society Test Technology Technical Community honored Hayes with Lifetime Contribution Medal.[13]
In 2014, Hayes was recognized with ACM Special Interest Group on Design Automation Pioneering Achievement Award "for his pioneering contributions to logic design, fault tolerant computing, and testing.”[14][15]
Best paper awards
- John P. Hayes, Trevor N. Mudge, Quentin F. Stout, Stephen Colley, John Palmer: A Microprocessor-based Hypercube Supercomputer. IEEE Micro 6(5): 6-17 (1986)
- Ram Raghavan, John P. Hayes: On randomly interleaved memories. ACM/IEEE Supercomputing Conference 1990: 49-58
- Avaneendra Gupta, John P. Hayes: A Hierarchical Technique for Minimum-Width Layout of Two-Dimensional CMOS Cells. VLSI Design 1997: 15-20
- HyungWon Kim, John P. Hayes: Delay Fault Testing of Designs with Embedded IP Cores. IEEE VLSI Test Symposium (VTS) 1999: 160-167
- Vivek V. Shende, Aditya K. Prasad, Igor L. Markov, John P. Hayes:Synthesis of reversible logic circuits. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 22(6): 710-722 (2003)[16]
- Smita Krishnaswamy, George F. Viamontes, Igor L. Markov, John P. Hayes: Accurate Reliability Evaluation and Enhancement via Probabilistic Transfer Matrices. Design Automation and Test in Europe (DATE) 2005: 282-287[17]
- Pai-Shun Ting, John P. Hayes: Eliminating a hidden error source in stochastic circuits. IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT) 2017: 1-6.[18]
Notable Students
Krishnendu Chakrabarty (Arizona State University), Shawn Blanton (CMU), Nagarajan Kandasamy (Drexel University), John Shen[ (CMU), Smita Krishnaswamy (Yale University)
References
- ↑ 1.0 1.1 Faculty profile , Univ. of Michigan, retrieved 2012-02-20.
- ↑ 2.0 2.1 2.2 "Prof. John P. Hayes retires after half a century in computer architecture". University of Michigan Computer Science and Engineering. May 22, 2023. https://cse.engin.umich.edu/stories/prof-john-p-hayes-retires-after-half-a-century-in-computer-architecture.
- ↑ "Prof. John P. Hayes retires after half a century in computer architecture" (in en-US). https://cse.engin.umich.edu/stories/prof-john-p-hayes-retires-after-half-a-century-in-computer-architecture/.
- ↑ 4.0 4.1 Distinguished Alumni Award (2004): John P. Hayes (MSEE ’67, PhD ’70), Univ. of Illinois, retrieved 2012-02-20.
- ↑ Hayes, J. P.; Mudge, T. N.; Stout, Q. F.; Colley, S.; Palmer, J. (1986), "Architecture of a hypercube supercomputer", Proc. International Conference on Parallel Processing, pp. 653–660.
- ↑ Hayes, J. P.; Mudge, T.; Stout, Q. F.; Colley, S.; Palmer, J. (1986), "A microprocessor-based hypercube supercomputer", IEEE Micro 6 (5): 6–17, doi:10.1109/MM.1986.304707. Lee, T. C.; Hayes, J. P. (1992), "A fault-tolerant communication scheme for hypercube computers", IEEE Transactions on Computers 41 (10): 1242–1256, doi:10.1109/12.166602.
- ↑ "A survey of the theory of hypercube graphs", Computers & Mathematics with Applications 15 (4): 277–289, 1988, doi:10.1016/0898-1221(88)90213-1.
- ↑ Hayes, J. P. (1976), "A Graph Model for Fault-Tolerant Computing Systems", IEEE Transactions on Computers C-25 (9): 875–884, doi:10.1109/TC.1976.1674712.
- ↑ Shende, V. V.; Prasad, A. K.; Markov, I. L.; Hayes, J. P. (2003), "Synthesis of reversible logic circuits", IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 22 (6): 710–722, doi:10.1109/TCAD.2003.811448.
- ↑ Alaghi, A.; Hayes, J. P. (2013). "Survey of Stochastic Computing". ACM Transactions on Embedded Computing Systems 12 (2s): 1. doi:10.1145/2465787.2465794.
- ↑ IEEE Fellow class of 1985 , retrieved 2012-02-20.
- ↑ ACM Fellow award citation, retrieved 2012-02-20.
- ↑ "TTTC Lifetime Contribution Medal". IEEE Test Technology Technical Community. https://www.ieee-tttc.org/tttc-lifetime-contribution-medal/.
- ↑ "John P. Hayes Recognized with ACM SIGDA Pioneering Achievement Award". University of Michigan Computer Science and Engineering. November 4, 2014. https://cse.engin.umich.edu/stories/john-p-hayes-recognized-with-acm-sigda-pioneering-achievement-award.
- ↑ "SIGDA Pioneering Achievement Award". ACM Special Interest Group on Design Automation. 18 June 2019. https://www.sigda.org/awards/pioneer/.
- ↑ "IEEE Transactions on Computer-Aided Design Donald O. Pederson Best Paper Award | IEEE Council on Electronic Design Automation" (in en). https://ieee-ceda.org/awards/ieee-transactions-computer-aided-design-donald-o-pederson-best-paper-award.
- ↑ "Best Paper Awards DATE 2006". https://past.date-conference.com/proceedings-archive/2006/DATE06/PDFFILES/BESTPPR.PDF.
- ↑ "Michigan researchers win best paper award at DFT 2017". University of Michigan Computer Science and Engineering. November 10, 2017. https://cse.engin.umich.edu/stories/michigan-researchers-win-best-paper-award-at-dft-2017.
External links
Original source: https://en.wikipedia.org/wiki/John P. Hayes.
Read more |