View source for Common Power Format

The Si2 '''Common Power Format''', or '''CPF''' is a [[File format|file format]] for specifying power-saving techniques early in the design process.  In the design of [[Engineering:Integrated circuit|integrated circuit]]s, saving power is a primary goal, and designers are forced to use sophisticated techniques such as [[Engineering:Clock gating|clock gating]], multi-voltage logic, and turning off the power entirely to inactive blocks.  These techniques require a consistent implementation in the design steps of logic design, implementation, and verification.  For example, if multiple different power supplies are used, then [[Logic synthesis|logic synthesis]] must insert level shifters, place and route must deal with them correctly, and other tools such as [[Static timing analysis|static timing analysis]] and [[Formal verification|formal verification]] must understand these components.  As power became an increasingly pressing concern, each tool independently added the features needed.  Although this made it possible to build low power flows, it was difficult and error prone since the same information needed to be specified several times, in several formats, to many different tools.  CPF was created as a common format that many tools can use to specify power-specific data, so that power intent only need be entered once and can be used consistently by all tools.  The aim of CPF is to support an automated, power-aware design infrastructure.
Associated with CPF is the Power Forward Initiative (PFI), a group of companies that collaborate to drive low-power design methodology and have contributed to the development of the CPF v1.0 specification. PFI membership spans EDA, IP, library, foundry fabs, ASIC, IDM, and equipment companies. In March 2007, CPF v1.0 was contributed to the [[Company:Silicon Integration Initiative|Silicon Integration Initiative]] (Si2) where it was ratified by Si2’s Low Power Coalition (LPC) as a Si2 standard. The LPC controls the ongoing evolution of the CPF v1.0 standard.

== Contents ==
Constructs expressing power domains and their power supplies:
* Logical design: hierarchical modules can be specified as belonging to specific power supply domains
* Physical design: explicit power/ground nets and connectivity can be specified per cell or block.
* Analysis: different timing library data for cases where the same cell is used in different power domains

Power control logic
* Specification of level shifter logic - special cells needed when signals traverse between blocks of different supply voltage.
* Specification of isolation logic - what special logic is needed for signals that traverse between blocks that can be powered up and down independently.
* Specification of state-retention logic - when blocks are switched off entirely, how is the state retained?
* Specification of switch logic and control signals - how are blocks switched on and off?

Definition and verification of power modes (standby, sleep, etc.)
* Mode definitions
* Mode transition expressions

== History and controversy ==

Cadence Design Systems designed the early versions of CPF,<ref>Chi-Ping Hsu, [http://www.eetimes.com/news/design/showArticle.jhtml?articleID=193600111 Pushing Power Forward with a Common Power Format - The Process of Getting it Right] {{Webarchive|url=https://web.archive.org/web/20070926220555/http://www.eetimes.com/news/design/showArticle.jhtml?articleID=193600111 |date=2007-09-26 }}, EETimes, 5 Nov 2006</ref> then contributed it to Si2.  This was followed shortly by an alternative effort, the [[Engineering:Unified Power Format|Unified Power Format]] or '''UPF''', proposed as an IEEE standard as opposed to an Si2 standard.  UPF has been driven mainly by [[Company:Synopsys|Synopsys]], [[Company:Mentor Graphics|Mentor Graphics]] and [[Company:Magma Design Automation|Magma]].  The technical differences between the two formats are relatively minor, but the political considerations are harder to overcome.<ref>Goering, Richard, [https://www.eetimes.com/ic-power-standards-convergence-falters;?articleID=198100646 IC power standards convergence falters], EETimes, 21 March 2007</ref><ref>Goering, Richard, [http://www.industrialcontroldesignline.com/news/199202963; IEEE's patent policy fails to quell EDA standards row] {{Webarchive|url=https://web.archive.org/web/20080219003335/http://www.industrialcontroldesignline.com/news/199202963; |date=2008-02-19 }}, EEtimes, 30 April 2007.</ref>  Not surprisingly, the Cadence Low-Power Solution supported Si2’s CPF very early on, as well as UPF as it emerged; whereas the Synopsys, and Mentor Graphics offerings all support UPF. Magma supports both CPF and UPF.

An attempt at convergence is taking place in the Low Power Coalition at Si2.<ref>[[Company:Silicon Integration Initiative|Silicon Integration Initiative]], [http://www.si2.org/?page=984 CPF 1.2 Roadmap], 17 September 2008.</ref>

== References ==

<references/>

==External links ==
*Download [http://www.si2.org/?page=811. CPF specification].

[[Category:Computer file formats]]
[[Category:Power standards]]

{{Sourceattribution|Common Power Format}}