View source for Engineering:AND gate

{{short description|Digital logic gate type}}
{| class="wikitable floatright" style="text-align:center"
|-
! colspan="3" | AND gate [[Truth table|truth table]]
|- bgcolor="#ddeeff"
|colspan=2|'''Input''' || '''Output'''
|- bgcolor="#ddeeff"
| A || B || A AND B
|-
|{{no2|0}} || {{no2|0}} || {{no2|0}}
|-
|{{no2|0}} || {{yes2|1}} || {{no2|0}}
|-
|{{yes2|1}} || {{no2|0}} || {{no2|0}}
|-
|{{yes2|1}} || {{yes2|1}} || {{yes2|1}}
|}

The '''AND gate''' is a basic digital [[Engineering:Logic gate|logic gate]] that implements [[Logical conjunction|logical conjunction]] (∧) from [[Mathematical logic|mathematical logic]]{{snd}} AND gate behaves according to the [[Truth table|truth table]]. A HIGH output (1) results only if all the inputs to the AND gate are HIGH (1). If not all inputs to the AND gate are  HIGH, LOW output results. The function can be extended to any number of inputs.

==Symbols==

There are three symbols for AND gates: the American (ANSI or 'military') symbol and the [[Organization:International Electrotechnical Commission|IEC]] ('European' or 'rectangular') symbol, as well as the deprecated DIN symbol. Additional inputs can be added as needed. For more information see [[Engineering:Logic gate#Symbols|Logic gate symbols]] article. It can also be denoted as symbol "^" or "&".

{| align=center style="text-align:center"
|[[Image:AND ANSI.svg]]
|[[Image:AND IEC.svg]]
|image:AND DIN.svg
|-
|''MIL/ANSI symbol''
|''IEC symbol''
|''DIN symbol''
|}

The AND gate with inputs ''A'' and ''B'' and output ''C'' implements the logical expression <math>C = A \cdot B</math>. This expression also may be denoted as <math>C=A \wedge B</math> or <math>C=A \And B</math>.

==Implementations==
{{Gallery
|File:DiodeANDgate.png|AND gate using [[Engineering:Diode|diode]]s
|File:TransistorANDgate.png|AND gate using [[Engineering:Transistor|transistor]]s
|File:NMOS AND gate.png|[[NMOS logic|NMOS]] AND gate
}}
An AND gate can be designed using only N-channel (pictured) or P-channel [[Engineering:MOSFET|MOSFET]]s, but is usually implemented with both ([[Engineering:CMOS|CMOS]]). The digital inputs '''a''' and '''b''' cause the output '''F''' to have the same result as the AND function. AND gates may be made from discrete components and are readily available as [[Engineering:Integrated circuit|integrated circuit]]s in several different [[Logic family|logic families]]. 

=== Analytical representation ===
<math>f(a,b)=a*b</math> is the analytical representation of AND gate:

* <math>f(0,0)=0*0=0</math>
* <math>f(0,1)=0*1=0</math>
* <math>f(1,0)=1*0=0</math>
* <math>f(1,1)=1*1=1</math>

=== Alternatives ===
{{further|Engineering:NAND logic|Engineering:NOR logic}}
If no specific AND gates are available, one can be made from [[Engineering:NAND gate|NAND]] or [[Engineering:NOR gate|NOR]] gates, because NAND and NOR gates are "universal gates" <ref>
Mano, M. Morris and Charles R. Kime. ''Logic and Computer Design Fundamentals, Third Edition.'' Prentice-Hall, 2004. p. 73.</ref> meaning that they can be used to make all the others.

{| align=center style="text-align:center"
! width="250" |Desired gate!! width="150" |NAND construction!! width="150" |NOR construction
|-
|[[Image:AND ANSI Labelled.svg]]||Image:AND from NAND.svg||[[File:AND from NOR.svg]]
|}

== See also ==

*[[OR gate]]
*[[Engineering:Inverter (logic gate)|NOT gate]]
*[[Engineering:NAND gate|NAND gate]]
*[[Engineering:NOR gate|NOR gate]]
*[[Engineering:XOR gate|XOR gate]]
*[[Engineering:XNOR gate|XNOR gate]]
*[[Engineering:IMPLY gate|IMPLY gate]]
*[[Boolean algebra]]
*[[Engineering:Logic gate|Logic gate]]

== References ==
{{reflist}}

{{Logical connectives}}

[[Category:Logic gates]]

{{Sourceattribution|AND gate}}