View source for Engineering:List of Intel Celeron microprocessors

{{short description|Wikipedia list article}}
The '''[[Engineering:Celeron|Celeron]]''' is a family of microprocessors from [[Company:Intel|Intel]] targeted at the low-end consumer market. CPUs in the Celeron brand have used designs from sixth- to eighth-generation CPU [[Microarchitecture|microarchitecture]]s.
==Desktop processors==

===P6 based Celerons===

====Celeron ''(single-core)''====

===== "Covington" (250 nm) =====
* All models support: ''[[MMX (instruction set)|MMX]]''
* Steppings: A0, A1, B0
{{cpulist|p6|covington|model=Celeron 266|ark=49933
|l2=0|fsb=66|mult=4|vmin=2.0|vmax=|tdp=16.59|date=April 15, 1998<ref>{{cite web|url=http://www.intel.com/pressroom/archive/releases/1998/dp041598.htm |title=New Intel® Pentium® II and Celeron® Processors Bring Optimized Performance to Computer Systems|publisher=Intel|access-date=2019-03-15}}</ref>|price=$155|links=1
|sspec1=SL2SY|step1=A0|sock1=Slot 1|part1=BX80523R266000
|sspec2=SL2YN|step2=A0
|sspec3=SL2TR|step3=A1
|sspec4=SL2QG|step4=A1
|sspec5=SL2Y3|step5=B0}}
{{cpulist|p6|covington|model=Celeron 300|ark=49934
|l2=0|fsb=66|mult=4.5|vmin=2.0|vmax=|tdp=18.48|date=June 1998|price=$159
|sspec1=SL27Z|step1=A0|sock1=Slot 1|part1=BX80523R300000
|sspec2=SL2YP|step2=A0
|sspec3=SL2Z7|step3=A0
|sspec4=SL2X8|step4=A1
|sspec5=SL2Y2|step5=A1
|sspec6=SL2Y4|step6=B0}}
{{end}}

===== "Mendocino" (250 nm) =====
* All models support: ''[[MMX (instruction set)|MMX]]''
* L2 cache is on-die, running at full CPU speed
{{cpulist|p6|mendocino|model=Celeron 300A|ark=27183
|l2=128|fsb=66|mult=4.5|vmin=2.0|vmax=|tdp=17.8|date=August 1998|price=$149|links=1
|sspec1=SL2WM|step1=A0|sock1=Slot 1|part1=B80524R300128
|sspec2=SL32A|step2=A0|sock2=Socket 370|part2=FV80524RX300128
|sspec3=SL36A|step3=B0
|sspec4=SL35Q|step4=B0}}
{{cpulist|p6|mendocino|model=Celeron 333|ark=27184
|l2=128|fsb=66|mult=5|vmin=2.0|vmax=|tdp=19.7|date=August 1998|price=$192
|sspec1=SL2WN|step1=A0|sock1=Slot 1|part1=B80524R333128
|sspec2=SL32B|step2=A0|sock2=Socket 370|part2=FV80524RX333128
|sspec3=SL36B|step3=B0
|sspec4=SL35R|step4=B0}}
{{cpulist|p6|mendocino|model=Celeron 366|ark=27185
|l2=128|fsb=66|mult=5.5|vmin=2.0|vmax=|tdp=21.7|date=January 1999|price=$131<br>$123
|sspec1=SL376|step1=A0|sock1=Slot 1|part1=B80524R366128
|sspec2=SL37Q|step2=A0|sock2=Socket 370|part2=FV80524RX366128
|sspec3=SL36C|step3=B0
|sspec4=SL35S|step4=B0}}
{{cpulist|p6|mendocino|model=Celeron 400|ark=27186
|l2=128|fsb=66|mult=6|vmin=2.0|vmax=|tdp=23.7|date=January 1999|price=$166<br>$158
|sspec1=SL37V|step1=A0|sock1=Slot 1|part1=BX80524R400128
|sspec2=SL39Z|step2=A0|sock2=Socket 370|part2=FV80524RX400128
|sspec3=SL37X|step3=B0
|sspec4=SL3A2|step4=B0}}
{{cpulist|p6|mendocino|model=Celeron 433|ark=27187
|l2=128|fsb=66|mult=6.5|vmin=2.0|vmax=|tdp=24.1|date=March 1999|price=
|sspec1=SL3BC|step1=A0|sock1=Slot 1|part1=80524RX433128
|sspec2=|step2=|sock2=Socket 370|part2=FV80524RX433128
|sspec3=SL3BA|step3=B0
|sspec4=SL3BS|step4=B0}}
{{cpulist|p6|mendocino|model=Celeron 466|ark=42097
|l2=128|fsb=66|mult=7|vmin=2.0|vmax=|tdp=25.7|date=April 1999|price=
|sspec1=SL3EH|step1=B0|sock1=Socket 370|part1=FV80524RX466128
|sspec2=SL3FL|step2=B0}}
{{cpulist|p6|mendocino|model=Celeron 500|ark=27188
|l2=128|fsb=66|mult=7.5|vmin=2.0|vmax=|tdp=27|date=August 1999|price=
|sspec1=SL3FY|step1=B0|sock1=Socket 370|part1=FV80524RX500128
|sspec2=SL3LQ|step2=B0}}
{{cpulist|p6|mendocino|model=Celeron 533|ark=27189
|l2=128|fsb=66|mult=8|vmin=2.0|vmax=|tdp=28.3|date=January 2000|price=
|sspec1=SL3FZ|step1=B0|sock1=Socket 370|part1=FV80524RX533128
|sspec2=SL3PZ|step2=B0}}
{{end}}

===== "Coppermine-128" (180 nm) =====
* All models support: ''[[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]]''
{{cpulist|p6|coppermine|model=Celeron 533A|ark=
|l2=128|fsb=66|mult=8|vmin=1.5/1.7|vmax=|tdp=14|date=March 29, 2000|price=|links=1
|sspec1=SL46S|step1=B0|sock1=Socket 370|part1=RB80526RX533128
|sspec2=SL4PD|step2=C0}}
{{cpulist|p6|coppermine|model=Celeron 566|ark=27190
|l2=128|fsb=66|mult=8.5|vmin=1.5/1.7/1.75|vmax=|tdp=19.2|date=March 29, 2000|price=$167<ref>{{cite web|url=http://www.cpu-world.com/CPUs/Celeron/Intel-Celeron%20566%20-%20RB80526RX566128%20(BX80526F566128).html |title=Intel Celeron 566 MHz - RB80526RX566128 / BX80526F566128 |publisher=Cpu-world.com |access-date=2016-04-21}}</ref>
|sspec1=SL3W7|step1=B0|sock1=Socket 370|part1=RB80526RX566128
|sspec2=SL46T|step2=B0
|sspec3=SL4NW|step3=C0
|sspec4=SL4PC|step4=C0
|sspec=* SL5L5&nbsp;(D0)}}
{{cpulist|p6|coppermine|model=Celeron 600|ark=27191
|l2=128|fsb=66|mult=9|vmin=1.5/1.7/1.75|vmax=|tdp=15.8|date=March 29, 2000|price=$181<ref>{{cite web|url=http://www.cpu-world.com/CPUs/Celeron/Intel-Celeron%20600%20-%20RB80526RX600128%20(BX80526F600128).html |title=Intel Celeron 600 MHz - RB80526RX600128 / BX80526F600128 |publisher=Cpu-world.com |access-date=2016-04-21}}</ref>
|sspec1=SL3W8|step1=B0|sock1=Socket 370|part1=RB80526RX600128
|sspec2=SL46U|step2=B0
|sspec3=SL4NX|step3=C0
|sspec4=SL4PB|step4=C0}}
{{cpulist|p6|coppermine|model=Celeron 633|ark=27192
|l2=128|fsb=66|mult=9.5|vmin=1.5/1.7/1.75|vmax=|tdp=16.5|date=June 26, 2000|price=$138<ref>{{cite web|url=http://www.cpu-world.com/CPUs/Celeron/Intel-Celeron%20633%20-%20RB80526RX633128%20(BX80526F633128).html |title=Intel Celeron 633 MHz - RB80526RX633128 / BX80526F633128 |publisher=Cpu-world.com |access-date=2016-04-21}}</ref>
|sspec1=SL3VS|step1=B0|sock1=Socket 370|part1=RB80526RX633128
|sspec2=SL3W9|step2=B0
|sspec3=SL4NY|step3=C0
|sspec4=SL4PA|step4=C0
|sspec=* SL533}}
{{cpulist|p6|coppermine|model=Celeron 667|ark=27193
|l2=128|fsb=66|mult=10|vmin=1.5/1.7/1.75|vmax=|tdp=17.5|date=June 26, 2000|price=$170<ref>{{cite web|url=http://www.cpu-world.com/CPUs/Celeron/Intel-Celeron%20667%20-%20RB80526RX667128%20(BX80526F667128).html |title=Intel Celeron 667 MHz - RB80526RX667128 / BX80526F667128 |publisher=Cpu-world.com |access-date=2016-04-21}}</ref>
|sspec1=SL48E|step1=B0|sock1=Socket 370|part1=RB80526RX667128
|sspec2=SL4AB|step2=B0
|sspec3=SL4NZ|step3=C0
|sspec4=SL4P9|step4=C0}}
{{cpulist|p6|coppermine|model=Celeron 700|ark=27194
|l2=128|fsb=66|mult=10.5|vmin=1.65/1.7/1.75|vmax=|tdp=18.3|date=June 26, 2000|price=$192<ref>{{cite web|url=http://www.cpu-world.com/CPUs/Celeron/Intel-Celeron%20700%20-%20RB80526RX700128%20(BX80526F700128).html |title=Intel Celeron 700 MHz - RB80526RX700128 / BX80526F700128 |publisher=Cpu-world.com |access-date=2016-04-21}}</ref>
|sspec1=SL48F|step1=B0|sock1=Socket 370|part1=RB80526RX700128
|sspec2=SL4E6|step2=B0
|sspec3=SL4EG|step3=B0
|sspec4=SL5E6|step4=B0
|sspec=
* SL4P2&nbsp;(C0)
* SL4P8&nbsp;(C0)
* SL52Z}}
{{cpulist|p6|coppermine|model=Celeron 733|ark=27195
|l2=128|fsb=66|mult=11|vmin=1.65/1.7/1.75|vmax=|tdp=23.6|date=November 13, 2000|price=$112<ref name="berkeley2000">{{cite web|url=http://infopad.eecs.berkeley.edu/CIC/announce/2000/Celeron-766.htm |title=Archived copy |access-date=2012-05-29 |url-status=dead |archive-url=https://web.archive.org/web/20100724100059/http://infopad.eecs.berkeley.edu/CIC/announce/2000/Celeron-766.htm |archive-date=2010-07-24 }}</ref>
|sspec1=SL4P3|step1=C0|sock1=Socket 370|part1=RB80526RX733128
|sspec2=SL4P7|step2=C0
|sspec3=SL52Y|step3=D0
|sspec4=SL5E9|step4=D0
|sspec=
* SL6TG
* SL6TH}}
{{cpulist|p6|coppermine|model=Celeron 766|ark=27196
|l2=128|fsb=66|mult=11.5|vmin=1.65/1.7/1.75|vmax=|tdp=20|date=November 13, 2000|price=$170<ref name="berkeley2000"/>
|sspec1=SL4P6|step1=C0|sock1=Socket 370|part1=RB80526RX766128
|sspec2=SL4QF|step2=C0
|sspec3=SL52X|step3=D0
|sspec4=SL5EA|step4=D0}}
{{cpulist|p6|coppermine|model=Celeron 800|ark=27197
|l2=128|fsb=100|mult=8|vmin=1.65/1.7/1.75|vmax=|tdp=20.8|date=January 2001|price=
|sspec1=SL4TF|step1=C0|sock1=Socket 370|part1=RB80526RY800128
|sspec2=SL55R|step2=C0
|sspec3=SL5EB|step3=D0
|sspec4=SL5WC|step4=D0
|sspec=
* SL5WW&nbsp;(D0)
* SL4Z2
* SL54P}}
{{cpulist|p6|coppermine|model=Celeron 850|ark=27198
|l2=128|fsb=100|mult=8.5|vmin=1.7/1.75|vmax=|tdp=25.7|date=April 9, 2001|price=$138<ref>{{cite web|url=http://www.neoseeker.com/news/978-intel-celeron-850-announced/ |title=Intel Celeron 850 Announced |publisher=Neoseeker |date=2001-04-09 |access-date=2016-04-21}}</ref>
|sspec1=SL5GA|step1=C0|sock1=Socket 370|part1=RB80526RY850128
|sspec2=SL5GB|step2=C0
|sspec3=SL54Q|step3=D0
|sspec4=SL5EC|step4=D0
|sspec=
* SL5WB&nbsp;(D0)
* SL5WX&nbsp;(D0)}}
{{cpulist|p6|coppermine|model=Celeron 900|ark=27199
|l2=128|fsb=100|mult=9|vmin=1.75|vmax=|tdp=26.7|date=July 2001|price=$64<ref>{{Cite web|url=http://www.theregister.co.uk/2001/08/24/intel_to_cut_up/|title = Intel to cut up to 55% off Pentium 4 prices Sunday}}</ref>
|sspec1=SL5LX|step1=D0|sock1=Socket 370|part1=RB80526RY900128
|sspec2=SL5MQ|step2=D0
|sspec3=SL5WA|step3=D0
|sspec4=SL5WY|step4=D0
|sspec=
* SL633&nbsp;(D0)
* SL5WX&nbsp;(D0)}}
{{cpulist|p6|coppermine|model=Celeron 950|ark=27201
|l2=128|fsb=100|mult=9.5|vmin=1.75|vmax=|tdp=28|date=August 31, 2001|price=$74<ref name="autogenerated1">{{cite web |url=http://www.geek.com/articles/chips/intels-celeron-hits-11ghz-20010831/ |title=Intel's Celeron hits 1.1GHz &#124; Chips |publisher=Geek.com |access-date=2016-04-21 |archive-date=2009-01-08 |archive-url=https://web.archive.org/web/20090108230448/http://www.geek.com/articles/chips/intels-celeron-hits-11ghz-20010831/ |url-status=dead }}</ref>
|sspec1=SL5UZ|step1=D0|sock1=Socket 370|part1=RB80526RY950128
|sspec2=SL5V2|step2=D0
|sspec3=SL634|step3=D0}}
{{cpulist|p6|coppermine|model=Celeron 1.00|ark=27164
|l2=128|fsb=100|mult=10|vmin=1.75|vmax=|tdp=29|date=August 31, 2001|price=$89<ref name="autogenerated1"/>
|sspec1=SL5XQ|step1=D0|sock1=Socket 370|part1=RB80526RY001128
|sspec2=SL5XT|step2=D0
|sspec3=SL635|step3=D0}}
{{cpulist|p6|coppermine|model=Celeron 1.10|ark=27166
|l2=128|fsb=100|mult=11|vmin=1.75|vmax=|tdp=33|date=August 31, 2001|price=$103<ref name="autogenerated1"/>
|sspec1=SL5XR|step1=D0|sock1=Socket 370|part1=RB80526RY005128
|sspec2=SL5XU|step2=D0}}
{{end}}

===== "Tualatin-256" (130 nm) =====
* Family 6 model 11
* All models support: ''[[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]]''

{{cpulist|p6|tualatin|model=Celeron 900A|ark=27200
|l2=256|fsb=100|mult=9|vmin=1.475|vmax=|tdp=|date=|price=|links=1
|sspec1=SL68V|step1=|sock1=Socket 370|part1=
}}
{{cpulist|p6|tualatin|model=Celeron 1000A|ark=27165
|l2=256|fsb=100|mult=10|vmin=1.475|vmax=|tdp=27.8/29.5|date=January 2002|price=|links=1
|sspec1=SL5ZF|step1=|sock1=Socket 370|part1=RK80530RY001256
|sspec2=SL5VP
|sspec3=SL6CB
|sspec4=SL6JQ
}}
{{cpulist|p6|tualatin|model=Celeron 1100A|ark=27167
|l2=256|fsb=100|mult=11|vmin=1.5|vmax=|tdp=27.8/29.5|date=January 2002|price=|links=1
|sspec1=SL5VQ|step1=|sock1=Socket 370|part1=RK80530RY005256
|sspec2=SL5ZE
|sspec3=SL6CA
|sspec4=SL6JR
|sspec5=SL6RM
}}
{{cpulist|p6|tualatin|model=Celeron 1200|ark=27168
|l2=256|fsb=100|mult=12|vmin=1.5|vmax=|tdp=29.9/32.9|date=October 2001|price=|links=1
|sspec1=SL5XS|step1=|sock1=Socket 370|part1=RK80530RY009256
|sspec2=SL5Y5
|sspec3=SL656
|sspec4=SL6C8
|sspec5=SL6JS
|sspec6=SL6RP
}}
{{cpulist|p6|tualatin|model=Celeron 1300|ark=27169
|l2=256|fsb=100|mult=13|vmin=1.5|vmax=|tdp=32/33.4|date=January 2002|price=|links=1
|sspec1=SL5VR|step1=|sock1=Socket 370|part1=RK80530RY013256
|sspec2=SL5ZJ
|sspec3=SL6C7
|sspec4=SL6JT
}}
{{cpulist|p6|tualatin|model=Celeron 1400|ark=27170
|l2=256|fsb=100|mult=14|vmin=1.5|vmax=|tdp=33.2/34.8|date=May 2002|price=|links=1
|sspec1=SL64V|step1=|sock1=Socket 370|part1=RK80530RY017256
|sspec2=SL68G
|sspec3=SL6C6
|sspec4=SL6JU
|sspec5=SL6JV
}}
{{cpulist|p6|tualatin|model=Celeron 1500|ark=
|l2=256|fsb=100|mult=15|vmin=1.5|vmax=|tdp=|date=|price=|links=1
|sspec1=SL6C5|step1=|sock1=Socket 370|part1=RK80530RY021256
}}
{{end}}

===Netburst based Celerons===

====Celeron ''(single-core)''====

===== "Willamette-128" (180 nm) =====
* Family 15 model 1
* All models support: ''[[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]]''
* Steppings: E0
{| class="wikitable"
!Model Number ||sSpec Number ||Freq.
(GHz)
![[CPU cache#Multi-level caches|L2]]
[[CPU cache#Multi-level caches|Cache]]
(KB)
![[Engineering:Front-side bus|FSB]]
(MHz)
!Mult ||[[CPU core voltage|Voltage]]
(V)
![[Thermal design power|TDP]]
(W)
!Socket ||Release
Date
!Part Number(s) ||Release
Price

({{wipe|United States dollar}})
|-
| Celeron 1.5<ref>{{cite web|url=http://www.cpu-world.com/CPUs/Celeron/Intel-Celeron%201500%20-%20RK80531RC021128.html |title=Celeron 1.5 |publisher=Cpu-world.com |date=2016-03-15 |access-date=2016-04-21}}</ref><ref>{{cite web|url=http://www.x86-guide.com/en/cpu/Intel-Celeron-1,5GHz-cpu-no3018.html |title=Celeron 1.5(OEM) |publisher=X86-guide.com |access-date=2016-04-21}}</ref> ||SL69W ||1.5 || rowspan="6" |128 || rowspan="6" |400 ||15× || rowspan="6" |1.75 || rowspan="2" |? || rowspan="6" |478 || rowspan="2" |2002 ||RK80531RC021128 ||
|-
| Celeron 1.6<ref>{{cite web|url=http://www.cpu-world.com/CPUs/Celeron/Intel-Celeron%201600%20-%20RK80531RC025128.html |title=Celeron 1.6 |publisher=Cpu-world.com |date=2016-03-15 |access-date=2016-04-21}}</ref><ref>{{cite web|url=http://www.x86-guide.com/en/cpu/Intel-Celeron-1,6GHz-cpu-no3019.html |title=Celeron 1.6(OEM) |publisher=X86-guide.com |date=2011-06-19 |access-date=2016-04-21}}</ref> ||SL69Y ||1.6 ||16× ||RK80531RC025128 ||
|-
|[http://ark.intel.com/Product.aspx?id=27172 Celeron 1.7] ||SL68C, SL69Z ||1.7 ||17× ||63.5 ||May 15
2002<ref>{{cite web|url=http://www.x86-guide.com/en/cpu/Intel-Celeron-1,7GHz-cpu-no112.html |title=Celeron 1.7(OEM) |publisher=X86-guide.com |access-date=2016-04-21}}</ref>
|BX80531P170G128<br>RK80531RC029128 ||
|-
|[http://ark.intel.com/Product.aspx?id=27173 Celeron 1.8] ||SL68D, SL6A2 ||1.8 ||18× ||66.1 ||Jun 12
2002<ref>{{cite web|url=http://www.x86-guide.com/en/cpu/Intel-Celeron-1,8GHz-cpu-no113.html |title=Celeron 1.8(OEM) |publisher=X86-guide.com |access-date=2016-04-21}}</ref>
|BX80531P180G128<br>RK80531RC033128 ||
|-
| Celeron 1.9<ref>{{cite web|url=http://www.cpu-world.com/CPUs/Celeron/Intel-Celeron%201900%20-%20RK80531RC037128%20(BX80531P190G128).html |title=Celeron 1.9 |publisher=Cpu-world.com |date=2016-03-15 |access-date=2016-04-21}}</ref><ref>{{cite web|url=http://www.x86-guide.com/en/cpu/Intel-Celeron-1,9GHz-cpu-no3020.html |title=Celeron 1.9(OEM) |publisher=X86-guide.com |access-date=2016-04-21}}</ref> ||SL68E, SL6A3 ||1.9 ||19× ||? || rowspan="2" |Jun 12
2002
|RK80531RC037128 ||
|-
| Celeron 2.0<ref>{{cite web|url=http://www.cpu-world.com/CPUs/Celeron/Intel-Celeron%202000%20-%20RK80531RC041128%20(BX80531P200G128).html |title=Celeron 2.0 |publisher=Cpu-world.com |date=2016-03-15 |access-date=2016-04-21}}</ref><ref>[http://www.x86-guide.com/en/cpu/Intel-Celeron-2,0GHz-(0,18µ)-cpu-no3021.html Celeron 2.0(OEM)]</ref> ||SL68F ||2.0 ||20× ||71.2 ||RK80531RC041128 ||
|}

===== "[[Engineering:Celeron#Northwood-128|Northwood-128]]" (130 nm) =====
* Family 15 model 2
* All models support: ''[[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]]''
* Steppings: C0, C1, D0, D1, D4, DD
{| class="wikitable"
!Model Number ||sSpec Number ||Freq.
(GHz)
![[CPU cache#Multi-level caches|L2 Cache]]
(KB)
![[Engineering:Front-side bus|FSB]]
(MHz)
!Mult ||[[CPU core voltage|Voltage]]
(V)
![[Thermal design power|TDP]]
(W)
!Socket ||Release Date ||Part Number(s) ||Release Price
({{wipe|United States dollar}})
|-
|[http://www.cpu-world.com/sspec/SL/SL7EZ.html Celeron 1.6]||SL7EZ ||1.6 || rowspan="11" |128 || rowspan="11" |400 ||16× ||1.475/
1.525
| || rowspan="11" |478 || ||RK80532RC025128 ||
|-
|[http://ark.intel.com/Product.aspx?id=27173 Celeron&nbsp;1.8A] ||SL7RU ||1.8 ||18× ||1.560-
1.725
|66.1 ||April
2003
|BX80532RC1800B<br>RK80532RC033128||
|-
|[http://ark.intel.com/Product.aspx?id=27174 Celeron 2.0] ||SL68F, SL6HY, SL6LC, SL6RV, SL6SW, SL6VY, SL6VR ||2.0 ||20× || rowspan="9" |1.315-
1.525
|52.8 ||Sep 18
2002
|BX80532RC2000B<br>RK80532RC041128 ||$33
|-
|[http://ark.intel.com/Product.aspx?id=27175 Celeron 2.1] ||SL6RS, SL6SY, SL6VS, SL6VZ ||2.1 ||21× ||55.5 || rowspan="2" |Nov 20 
2002
|BX80532RC2100B<br>RK80532RC045128 ||
|-
|[http://ark.intel.com/Product.aspx?id=27176 Celeron 2.2] ||SL6SX, SL6RW, SL6VT, SL6W2 ||2.2 ||22× ||57.1 ||BX80532RC2200B<br>RK80532RC049128 ||
|-
|[http://ark.intel.com/Product.aspx?id=27177 Celeron 2.3] ||SL6T2, SL6T3, SL6T5, SL6WD, SL6XJ ||2.3 ||23× ||58.3 || rowspan="2" |Mar 31 
2003
|BX80532RC2300B<br>RK80532RC052128 ||
|-
|[http://ark.intel.com/Product.aspx?id=27178 Celeron 2.4] ||SL6V2, SL6VU, SL6W4, SL6XG ||2.4 ||24× ||59.8 ||BX80532RC2400B<br>RK80532RC056128 ||
|-
|[http://ark.intel.com/Product.aspx?id=27179 Celeron 2.5] ||SL6ZY, SL72B ||2.5 ||25× ||61 || rowspan="2" |Jun 25
2003
|BX80532RC2500B<br>BX80532RC2500D<br>RK80532RC060128 ||$33
|-
|[http://ark.intel.com/Product.aspx?id=27180 Celeron 2.6] ||SL6VV, SL6W5 ||2.6 ||26× ||62.6 ||BX80532RC2600B<br>BX80532RC2600D<br>RK80532RC064128 ||
|-
|[http://ark.intel.com/Product.aspx?id=27181 Celeron 2.7] ||SL77S, SL77U ||2.7 ||27× ||66.8 ||Sep 24
2003
|BX80532RC2700B<br>BX80532RC2700D<br>RK80532RC068128 ||$103<ref>{{cite web|url=http://www.cpu-world.com/CPUs/Celeron/Intel-Celeron%202700%20-%20RK80532RC068128%20(BX80532RC2700B).html |title=Intel Celeron 2.7 GHz - RK80532RC068128 / BX80532RC2700B |publisher=Cpu-world.com |date=2016-03-09 |access-date=2016-04-21}}</ref>
|-
|[http://ark.intel.com/Product.aspx?id=27182 Celeron 2.8] ||SL77T, SL77V ||2.8 ||28× ||68.4 ||5 Nov
2003
|BX80532RC2800B<br>RK80532RC072128 ||
|}

====Celeron D ''(single core)''====

===== "[[Engineering:Celeron#Prescott-256|Prescott-256]]" (90 nm) =====
* All models support: ''[[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]]''
* ''Intel 64'': supported by 3x1, 3x6, 355
* ''XD bit (an [[NX bit]] implementation)'': supported by 3x0J, 3x5J, and all Intel64-compatible models
* Steppings: C0, D0, E0, G0 & G1
{| class="wikitable"
!Model Number ||sSpec Number ||Freq.
(GHz)
![[CPU cache#Multi-level caches|L2 Cache]]
(KB)
![[Engineering:Front-side bus|FSB]]
(MHz)
!Mult ||[[CPU core voltage|Voltage]]
(V)
![[Thermal design power|TDP]]
(W)
!Socket ||Release Date ||Part Number(s) ||Release Price
({{wipe|United States dollar}})
|-
|[http://ark.intel.com/Product.aspx?id=27104 Celeron D 310] ||SL8S2, SL8RZ, SL93R, SL8S4 ||2.133 || rowspan="27" |256 || rowspan="27" |533 ||16× || rowspan="27" |1.250
-1.400
| rowspan="4" |73 || rowspan="3" |478 ||Dec
2005
|RK80546RE046256<br>B80546RE046256<br>NE80546RE046256 ||
|-
|[http://ark.intel.com/Product.aspx?id=27105 Celeron D 315] ||SL7XY, SL7XG, SL7WS, SL87K, SL93Q, SL8HH, SL8AW ||2.266 ||17× || rowspan="5" |Jun 24
2004
|RK80546RE051256<br>B80546RE051256<br>NE80546RE051256 ||$30
|-
|[http://ark.intel.com/Product.aspx?id=27107 Celeron D 320] ||SL7KX, SL7JV, SL7C4, SL8HJ, SL87J, SL7VW || rowspan="2" |2.4 ||18× ||RK80546RE056256 ||$69<ref name=anand>{{cite news|last1=Wilson|first1=Derek|title=Intel Celeron D: New, Improved & Exceeds Expectations|url=http://www.anandtech.com/print/1363/|work=Anandtech|date=June 24, 2004}}</ref>
|-
|[http://ark.intel.com/Product.aspx?id=27107 Celeron D 320] ||SL7VQ ||18× ||LGA 775||BX80547RE2400C ||$69<ref name=anand/>
|-
|[http://ark.intel.com/Product.aspx?id=27108 Celeron D 325] ||SL7ND, SL7NU, SL7C5, SL7KY, SL7VX, SL8HK, SL7TG || rowspan="4" |2.533 ||19× ||65,
73
|478 ||RK80546RE061256 ||$79<ref name=anand/>
|-
|[http://ark.intel.com/Product.aspx?id=27109 Celeron D 325] ||SL7TU ||19× ||84 || rowspan="3" |LGA 775 ||BX80547RE2533C ||$79<ref name=anand/>
|-
|[http://ark.intel.com/Product.aspx?id=27110 Celeron D 325J] ||SL7TL, SL7VR, SL7SS ||19× ||65, 84 || rowspan="2" |Sep 22
2004
|JM80547RE061256 ||$79<ref name=anand/>
|-
|[http://ark.intel.com/Product.aspx?id=27111 Celeron D 326] ||SL7TU, SL8H5, SL98U ||19× ||84 ||JM80547RE061CN ||$79<ref name=anand/>
|-
|[http://ark.intel.com/Product.aspx?id=27112 Celeron D 330] ||SL7KZ, SL7NV, SL7C6, SL7DL, SL7VY, SL8HL, SL7TH || rowspan="4" |2.667 ||20× || rowspan="2" |73 ||478 || rowspan="2" |Jun 24
2004
|RK80546RE067256 ||$89<ref name=anand/>
|-
|[http://ark.intel.com/Product.aspx?id=27113 Celeron D 330] ||SL8HL ||20× || rowspan="3" |LGA 775 ||BX80547RE2667C ||$89<ref name=anand/>
|-
|[http://ark.intel.com/Product.aspx?id=27114 Celeron D 330J] ||SL7TM, SL7VS, SL7TV, SL7ST, '''Instruction Set 32-bit''' ||20× || rowspan="2" |84 || rowspan="2" |Sep 22
2004
|JM80547RE067256 ||$89<ref name=anand/>
|-
|[http://ark.intel.com/Product.aspx?id=27115 Celeron D 331] ||SL7TV, SL8H7, SL98V, '''Instruction Set 64-bit''' ||20× ||JM80547RE067CN ||$89<ref name=anand/>
|-
|[http://ark.intel.com/Product.aspx?id=27116 Celeron D 335] ||SL8HM, SL7NW, SL7VZ, SL7TJ, SL7DM, SL7L2, SL7C7 || rowspan="4" |2.8 ||21× ||73 ||478 || rowspan="2" |Jun 24
2004
|RK80546RE072256 ||$117<ref name=anand/>
|-
|[http://ark.intel.com/Product.aspx?id=27117 Celeron D 335] ||SL7TW ||21× || rowspan="3" |84 || rowspan="3" |LGA 775 ||BX80547RE2800C ||$117<ref name=anand/>
|-
|[http://ark.intel.com/Product.aspx?id=27118 Celeron D 335J] ||SL7TN, SL7VT, SL7SU ||21× || rowspan="2" |Sep 22
2004
|JM80547RE072256 ||$117<ref name=anand/>
|-
|[http://ark.intel.com/Product.aspx?id=27119 Celeron D 336] ||SL7TW, SL8H9, SL98W ||21× ||JM80547RE072CN ||
|-
|[http://ark.intel.com/Product.aspx?id=27120 Celeron D 340] ||SL7RN, SL7Q9, SL8HN, SL7W2, SL7TS || rowspan="4" |2.933 ||22× ||73 ||478 || rowspan="2" |Sep
2004
|RK80546RE077256 ||$54
|-
|[http://ark.intel.com/Product.aspx?id=27121 Celeron D 340J] ||SL7TX, SL7TP, SL7RN||22× || rowspan="3" |84 || rowspan="3" |LGA 775 ||BX80547RE2933C ||$54
|-
|[http://ark.intel.com/Product.aspx?id=27121 Celeron D 340J] ||SL7TP, SL7SV, SL7QA ||22× || rowspan="2" |Sep 22
2004
|JM80547RE077256 ||
|-
|[http://ark.intel.com/Product.aspx?id=27122 Celeron D 341] ||SL7TX, SL8HB, SL98X ||22× ||JM80547RE077CN ||$47
|-
|[http://ark.intel.com/Product.aspx?id=27123 Celeron D 345] ||SL7NX, SL7DN, SL8HP, SL7W3 || rowspan="3" |3.066 ||23× ||73 ||478 ||Nov
2004
|RK80546RE083256 ||
|-
|[http://ark.intel.com/Product.aspx?id=27124 Celeron D 345J] ||SL7TQ, SL7VV, SL7TY ||23× || rowspan="2" |84 ||LGA 775, Socket 478 || rowspan="2" |Oct
2004
|JM80547RE083256 ||
|-
|[http://ark.intel.com/Product.aspx?id=27125 Celeron D 346] ||SL7TY, SL8HD, SL9BR ||23× ||LGA 775 ||JM80547RE083CN ||$43
|-
|[http://ark.intel.com/Product.aspx?id=27126 Celeron D 350] ||SL8HQ, SL7NY, SL7L4, SL7DN || rowspan="3" |3.20 ||24× || rowspan="2" |73 || rowspan="2" |478 || rowspan="3" |Jun 28
2005
| NE80546RE088256<br>RK80546RE088256 ||
|-
|[http://ark.intel.com/Product.aspx?id=27127 Celeron D 350J] ||SL8MK, SL7TZ ||24× || RH80536NC0131M ||
|-
|[http://ark.intel.com/Product.aspx?id=27128 Celeron D 351] ||SL7TZ, SL8HF, SL9BS ||24× || rowspan="2" |84 || rowspan="2" |LGA 775 ||JM80547RE088CN ||$49
|-
|[http://ark.intel.com/Product.aspx?id=27130 Celeron D 355] ||SL8HS, SL9BT ||3.333 ||25× ||Dec
2005
|HH80547RE093CN ||$54
|}

===== "[[Engineering:Celeron#Cedar Mill-512|Cedar Mill-512]]" (65 nm) =====
* All models support: ''[[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], Intel 64, XD bit (an [[NX bit]] implementation)''
* Steppings: C1, D0
{| class="wikitable"
!Model Number ||sSpec Number ||Freq.
(GHz)
![[CPU cache#Multi-level caches|L2 Cache]]
(KB)
![[Engineering:Front-side bus|FSB]]
(MHz)
!Mult ||[[CPU core voltage|Voltage]]
(V)
![[Thermal design power|TDP]]
(W)
!Socket ||Release Date ||Part Number(s) ||Release
Price

({{wipe|United States dollar}})
|-
|[http://ark.intel.com/Product.aspx?id=27974 Celeron D 347] ||SL9XU (C1)<br>SL9KN (D0) ||3.066 || rowspan="5" |512 || rowspan="5" |533 ||23× || rowspan="5" |1.25
–1.325
|86 <br>65 || rowspan="5" |LGA 775 ||Oct 22
2006
|HH80552RE083512 ||$49
|-
|[http://ark.intel.com/Product.aspx?id=27129 Celeron D 352] ||SL96P (C1)<br>{{text|SL9KM}} (D0) ||3.20 ||24× ||86<br>65 || rowspan="2" |May 28
2006
|HH80552RE088512 ||$79
|-
|[http://ark.intel.com/Product.aspx?id=27131 Celeron D 356] ||SL96N (C1)<br>SL9KL (D0) ||3.333 ||25× ||86<br>65 ||HH80552RE093512 ||$89
|-
|[http://ark.intel.com/Product.aspx?id=27132 Celeron D 360] ||SL9KK (D0) ||3.466 ||26× || rowspan="2" |65 ||Nov 26
2006
|HH80552RE099512 ||$84
|-
|[http://ark.intel.com/Product.aspx?id=27975 Celeron D 365] ||{{Not a typo|SL9KJ}} (D0) ||3.60 ||27× ||Jan
2007
|HH80552RE104512 ||$69
|}

=== Core based Celerons ===

====Celeron ''(single-core)''====

====="Conroe-L" (65 nm)=====
* All models support: ''[[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[SSSE3]], Intel 64, XD bit (an [[NX bit]] implementation)''
* Steppings: A1
{{cpulist|core|conroe|model=Celeron 220|ark=33102
|cores=1|l2=512|fsb=533|mult=9|vmin=1.05|vmax=1.3|tdp=19|sock=µFC-BGA|date=October 2007|price=$58|links=1
|sspec1=SLAF2|step1=A1|part1=LE80557RE014512}}
{{cpulist|core|conroe|model=Celeron 420|ark=29734
|cores=1|l2=512|fsb=800|mult=8|vmin=1.05|vmax=1.3|tdp=35|date=June 2007|price=$39
|sspec1=SL9XP|step1=A1|part1=HH80557RG025512}}
{{cpulist|core|conroe|model=Celeron 430|ark=29735
|cores=1|l2=512|fsb=800|mult=9|vmin=1.05|vmax=1.3|tdp=35|date=June 2007|price=$49
|sspec1=SL9XN|step1=A1|part1=HH80557RG033512}}
{{cpulist|core|conroe|model=Celeron 440|ark=29736
|cores=1|l2=512|fsb=800|mult=10|vmin=1.05|vmax=1.3|tdp=35|date=June 2007|price=$59
|sspec1=SL9XL|step1=A1|part1=HH80557RG041512}}
{{cpulist|core|conroe|model=Celeron 450|ark=35239
|cores=1|l2=512|fsb=800|mult=11|vmin=1.05|vmax=1.3|tdp=35|date=August 2008|price=$53
|sspec1=SLAFZ|step1=A1|part1=HH80557RG049512}}
{{end}}

====="Conroe-CL" (65 nm)=====
* All models support: ''[[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[SSSE3]], Intel 64, XD bit (an [[NX bit]] implementation)'', Intel VT-x
* Steppings: ?
{{cpulist|core|conroe|model=Celeron 445|ark=35277
|cores=1|l2=512|fsb=1066|mult=7|sock=LGA 771|links=1
|sspec1=SLAGH|part1=HH80556KH036512S
|part2=HH80556KH036D}}
{{end}}

==== Celeron ''(dual-core)'' {{anchor|Celeron Dual-Core}} ====

===== "Allendale" (65 nm) =====
*All models support: ''[[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[SSSE3]], Enhanced Intel [[Engineering:SpeedStep|SpeedStep]] Technology (EIST), Intel 64, XD bit (an [[NX bit]] implementation)''
* Steppings: M0
{{cpulist|core|head}} <!-- to change the style of this table, edit Template:cpulist -->
{{cpulist|core|conroe|model=Celeron E1200|ark=34440
|fsb=800|l2=512||mult=8|vmin=1.162|vmax=1.312|date=January 2008|price=$53|links=1
|sspec1=SLAQW|step1=M0|part1=HH80557PG025D}}
{{cpulist|core|conroe|model=Celeron E1400|ark=35101
|fsb=800|l2=512||mult=10|vmin=1.162|vmax=1.312|date=April 2008|price=$53
|sspec1=SLAR2|step1=M0|part1=HH80557PG041D}}
{{cpulist|core|conroe|model=Celeron E1500|ark=35100
|fsb=800|l2=512||mult=11|vmin=0.962|vmax=1.275|date=2008|price=$53
|sspec1=SLAQZ|step1=M0|part1=HH80557PG049D}}
{{cpulist|core|conroe|model=Celeron E1600|ark=34751
|fsb=800|l2=512||mult=12|vmin=0.962|vmax=1.275|date=May 2009|price=$53
|sspec1=SLAQY|step1=M0|part1=HH80557PG056D}}
{{end}}

===== [[Engineering:Wolfdale (microprocessor)#Wolfdale-3M|"Wolfdale-3M"]] (45 nm) =====
* Based on Core microarchitecture
* All models support: ''[[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[SSSE3]], Enhanced Intel [[Engineering:SpeedStep|SpeedStep]] Technology (EIST), Intel 64, XD bit (an [[NX bit]] implementation), Intel VT-x''
* Steppings: R0
* [[Engineering:Die (integrated circuit)|Die]] size: 82&nbsp;mm<sup>2</sup>
{{cpulist|core|head}} <!-- to change the style of this table, edit Template:cpulist -->
{{cpulist|core|wolfdale|model=Celeron E3200|ark=42770
|fsb=800|l2=1|mult=12|vmin=0.85|vmax=1.3625|date=August 2009|price=$43|links=1
|sspec1=SLGU5|step1=R0|part1=BX80571E3200|part2=AT80571RG0561ML}}
{{cpulist|core|wolfdale|model=Celeron E3300|ark=42771
|fsb=800|l2=1|mult=12.5|vmin=0.85|vmax=1.3625|date=August 2009|price=$43
|sspec1=SLGU4|step1=R0|part1=BX80571E3300|part2=AT80571RG0601ML}}
{{cpulist|core|wolfdale|model=Celeron E3400|ark=42772
|l2=1|fsb=800|mult=13|vmin=0.85|vmax=1.3625|date=January 2010|price=$53
|sspec1=SLGTZ|step1=R0|part1=BX80571E3400|part2=AT80571RG0641ML}}
{{cpulist|core|wolfdale|model=Celeron E3500|ark=42773
|l1=64KB|l2=1|fsb=800|mult=13.5|vmin=0.85|vmax=1.3625|date=August 2010|price=$52
|sspec1=SLGTY|step1=R0|part1=BX80571E3500
|part2=AT80571RG0681ML}}
{{end}}

=== Westmere based Celerons ===

==== Celeron ''(dual-core)'' ====

===== "[[Engineering:Clarkdale (microprocessor)|Clarkdale]]" (MCP, 32 nm) =====
* Based on Westmere microarchitecture
* All models support: ''[[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[SSSE3]], Enhanced Intel [[Engineering:SpeedStep|SpeedStep]] Technology (EIST), Intel 64, XD bit (an [[NX bit]] implementation), Intel VT-x, Smart Cache.
* Contains 45 nm "Ironlake" [[Graphics processing unit|GPU]].
{{cpulist|nehgfx|clarkdale|ark=43523|model=Celeron G1101|mult=17|turbo={{n/a}}|gfxclock=533|l3=2|memspeed=1066|vmin=0.65|vmax=1.4|date=January 2010|price=$70|part1=CM80616004596AC|sspec1=SLBMT|sspec2=SLBT7|step1=C2|step2=K0|links=1}}
{{end}}

=== Sandy Bridge based Celerons ===

==== "Sandy Bridge" (32 nm) ====
* All models support: ''[[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[SSSE3]], SSE4.1, SSE4.2, Enhanced Intel [[Engineering:SpeedStep|SpeedStep]] Technology (EIST), Intel 64, XD bit (an [[NX bit]] implementation), Intel VT-x, Smart Cache.''
* Celeron G440 does '''not''' support Enhanced Intel [[Engineering:SpeedStep|SpeedStep]] Technology (EIST), this is a special case as the processor uses the minimum available multiplier (16x). The Celeron G440 also does '''not''' support [[Hyper-threading]].
* Celeron G460, G465 and G470 support Hyper-threading.
* HD Graphics (Sandy Bridge) contain 6 [[Execution unit|EUs]] like the HD Graphics 2000, but does not support the following technologies: [[Software:Intel Quick Sync Video|Intel Quick Sync Video]], InTru 3D, Clear Video HD, Wireless Display, and it does not support 3D Video.{{citation needed|date=September 2011}}
* Transistors: 624 or 504 million
* [[Engineering:Die (integrated circuit)|Die]] size: 149 or 131&nbsp;mm<sup>2</sup>
{{cpulist|bridge|sandybridge|model=Celeron G530|ark=53414
|cores=2|l3=2|mult=24|gfxmodel=6eu|gfxclock=850–1000|tdp=65|date=September 2011|price=$42|links=1
|sspec1=SR05H|step1=Q0|sock=1155|part1=CM8062301046704|part2=BX80623G530|part3=BXC80623G530}}
{{cpulist|bridge|sandybridge|model=Celeron G540|ark=53416
|cores=2|l3=2|mult=25|gfxmodel=6eu|gfxclock=850–1000|tdp=65|date=September 2011|price=$52
|sspec1=SR05J|step1=Q0|sock=1155|part1=CM8062301046804|part2=BX80623G540|part3=BXC80623G540}}
{{cpulist|bridge|sandybridge|model=Celeron G550|ark=53418
|cores=2|l3=2|mult=26|gfxmodel=6eu|gfxclock=850–1000|tdp=65|date=June 2012|price=$52
|sspec1=SR061|step1=Q0|sock=1155|part1=CM8062307261218|part2=BX80623G550|part3=BXC80623G550}}
{{cpulist|bridge|sandybridge|model=Celeron G555|ark=69115
|cores=2|l3=2|mult=27|gfxmodel=6eu|gfxclock=850–1000|tdp=65|date=September 2012|price=$52
|sspec1=SR0RZ|step1=Q0|sock=1155|part1=CM8062301263601|part2=BX80623G555|part3=BXC80623G555}}
{{cpulist|bridge|sandybridge|model=Celeron G440|ark=58667
|cores=1|l3=1|mult=16|gfxmodel=6eu|gfxclock=650–1000|tdp=35|date=September 2011|price=$37
|sspec1=SR0BY|step1=Q0|sock=1155|part1=CM8062301088501|part2=BX80623G440|part3=BXC80623G440}}
{{cpulist|bridge|sandybridge|model=Celeron G460|ark=63913
|cores=1|l3=1.5|mult=18|gfxmodel=6eu|gfxclock=650–1000|tdp=35|date=December 2011|price=$37
|sspec1=SR0GR|step1=Q0|sock=1155|part1=CM8062301088702|part2=BX80623G460|part3=BXC80623G460}}
{{cpulist|bridge|sandybridge|model=Celeron G465|ark=69363
|cores=1|l3=1.5|mult=19|gfxmodel=6eu|gfxclock=650–1000|tdp=35|date=September 2012|price=$37
|sspec1=SR0S8|step1=Q0|sock=1155|part1=CM8062301264500|part2=BX80623G465|part3=BXC80623G465}}
{{cpulist|bridge|sandybridge|model=Celeron G470|ark=74390
|cores=1|l3=1.5|mult=20|gfxmodel=6eu|gfxclock=650–1000|tdp=35|date=June 2013|price=$37
|sspec1=SR0S7|step1=Q0|sock=1155|part1=CM8062301264401|part2=BX80623G470|part3=}}
{{cpulist|bridge|sandybridge|model=Celeron G530T|ark=53415
|cores=2|l3=2|mult=20|gfxmodel=6eu|gfxclock=650–1000|tdp=35|date=September 2011|price=$47
|sspec1=SR05K|step1=Q0|sock=1155|part1=CM8062301046904}}
{{cpulist|bridge|sandybridge|model=Celeron G540T|ark=53417
|cores=2|l3=2|mult=21|gfxmodel=6eu|gfxclock=650–1000|tdp=35|date=June 2012|price=$42
|sspec1=SR05L|step1=Q0|sock=1155|part1=CM8062301047004}}
{{cpulist|bridge|sandybridge|model=Celeron G550T|ark=53419
|cores=2|l3=2|mult=22|gfxmodel=6eu|gfxclock=650–1000|tdp=35|date=September 2012|price=$42
|sspec1=SR05V|step1=Q0|sock=1155|part1=CM8062301002309}}
{{end}}

==== "Ivy Bridge" (22 nm) ====
* All models support: ''[[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[SSSE3]], SSE4.1, SSE4.2, Enhanced Intel [[Engineering:SpeedStep|SpeedStep]] Technology (EIST), Intel 64, XD bit (an [[NX bit]] implementation), Intel VT-x, Smart Cache, ECC Memory.''
* [[Engineering:Intel HD Graphics|HD Graphics]] (Ivy Bridge) contain 6 [[Execution unit|EUs]] as well as HD Graphics 2500, but does not support the following technologies: Intel Quick Sync Video, InTru 3D, Clear Video HD, Wireless Display, Intel Insider.
{{cpulist|bridge|ivybridge|model=Celeron G1610|ark=71072
|cores=2|l3=2|mult=26|turbo={{n/a}}|gfxmodel=6eu|gfxclock=650–1050|tdp=55|date=January 20, 2013|price=$42|links=1
|sspec1=SR10K|step1=P0|sock1=LGA 1155|part1=CM8063701444901|part2=BX80637G1610|part3=BXC80637G1610}}
{{cpulist|bridge|ivybridge|model=Celeron G1620|ark=71073
|cores=2|l3=2|mult=27|turbo={{n/a}}|gfxmodel=6eu|gfxclock=650–1050|tdp=55|date=January 20, 2013|price=$52|
|sspec1=SR10L|step1=P0|sock1=LGA 1155|part1=CM8063701445001|part2=BX80637G1620|part3=BXC80637G1620}}
{{cpulist|bridge|ivybridge|model=Celeron G1630|ark=76344
|cores=2|l3=2|mult=28|turbo={{n/a}}|gfxmodel=6eu|gfxclock=650–1050|tdp=55|date=September 1, 2013|price=$52|
|sspec1=SR16A|step1=P0|sock1=LGA 1155|part1=CM8063701449000|part2=BX80637G1630|part3=}}
{{cpulist|bridge|ivybridge|model=Celeron G1610T|ark=71074
|cores=2|l3=2|mult=23|turbo={{n/a}}|gfxmodel=6eu|gfxclock=650–1050|tdp=35|date=January 20, 2013|price=$42|
|sspec1=SR10M|step1=P0|sock1=LGA 1155|part1=CM8063701445100}}
{{cpulist|bridge|ivybridge|model=Celeron G1620T|ark=76345
|cores=2|l3=2|mult=24|turbo={{n/a}}|gfxmodel=6eu|gfxclock=650–1050|tdp=35|date=September 1, 2013|price=$42|
|sspec1=SR169|step1=P0|sock1=LGA 1155|part1=CM8063701448300}}
{{end}}

=== Silvermont based Celerons ===

===="[[Engineering:Silvermont|Bay Trail-D]]" (22 nm)====
* All models support: ''[[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[SSSE3]], Enhanced Intel [[Engineering:SpeedStep|SpeedStep]] Technology (EIST), Intel 64, Intel VT-x''.
* GPU and memory controller are integrated onto the processor die
* GPU is based on Ivy Bridge [[Engineering:Intel HD Graphics|Intel HD Graphics]], with 4 execution units, and supports DirectX 11, OpenGL 4.0, OpenGL ES 3.0 and OpenCL 1.1 (on Windows). J1800 and J1900 support Intel Quick Sync Video.
* Package size:  25&nbsp;mm × 27&nbsp;mm
{{cpulist|silvermont|baytrail|model=Celeron J1750|ark=76531|cores=2|mult=29|l2=1|gfxmodel=4eu|mem=2 × DDR3L-1333
|gfxclock=688-750|tdp=10|sdp=|sock1=FC-BGA 1170|date=September 2013|price=$72|links=1
  |sspec1=SR1LP|sspec2=SR1H6|step1=B2|step2=B2|part1=FH8065301562600}}
{{cpulist|silvermont|baytrail|model=Celeron J1800|ark=78866|cores=2|mult=29|l2=1|burst=2.58|gfxmodel=4eu|mem=2 × DDR3L-1333
|gfxclock=688-792|tdp=10|sdp=|sock1=FC-BGA 1170|date=November 2013|price=$72
  |sspec1=SR1SD|step1=B3|part1=FH8065301615103
  |sspec2=SR1UU|step2=C0|part2=FH8065301615104
  |sspec3=SR3V6|step3=D1|part3=FH8065301615104}}
{{cpulist|silvermont|baytrail|model=Celeron J1850|ark=76530|cores=4|mult=24|gfxmodel=4eu|mem=2 × DDR3L-1333
|gfxclock=688-792|tdp=10|sdp=|sock1=FC-BGA 1170|date=September 2013|price=$82
  |sspec1=SR1LN|sspec2=SR1H5|step1=B2|step2=B2|part1=FH8065301455200}}
{{cpulist|silvermont|baytrail|model=Celeron J1900|ark=78867|cores=4|mult=24|burst=2.41|gfxmodel=4eu|mem=2 × DDR3L-1333
|gfxclock=688-854|tdp=10|sdp=|sock1=FC-BGA 1170|date=November 2013|price=$82
  |sspec1=SR1SC|step1=B3|part1=FH8065301615009
  |sspec2=SR1UT|step2=C0|part2=FH8065301615010
  |sspec3=SR3V5|step3=D1|part3=FH8065301615010}}
{{end}}

=== Airmont based Celerons ===

===="[[Engineering:Silvermont|Braswell]]" (14 nm)====
* All models support: ''[[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[SSSE3]], SSE4.1, SSE4.2, Enhanced Intel [[Engineering:SpeedStep|SpeedStep]] Technology (EIST), Intel 64, XD bit (an [[NX bit]] implementation), Intel VT-x, [[AES instruction set|AES-NI]]''.
* GPU and memory controller are integrated onto the processor die
* GPU is based on [[Broadwell (microarchitecture)|Broadwell]] [[Engineering:Intel HD Graphics|Intel HD Graphics]], with 12 execution units, and supports DirectX 11.2, OpenGL 4.4, OpenGL ES 3.0 and OpenCL 2.0 (on Windows).
* Package size: 25&nbsp;mm × 27&nbsp;mm
{{cpulist|silvermont|baytrail|model=Celeron J3060|ark=91534|cores=2|mult=19.2|burst=2.48|gfxmodel=400
|gfxclock=320-700|l2=1<ref group="note" name="cpuworld">2-core variants are erroneously described as featuring 2&nbsp;MB L2 cache on [//ark.intel.com Intel ARK], but in fact only have 1&nbsp;MB L2 cache; see {{cite web|url=http://www.cpu-world.com/news_2015/2015033101_Intel_quietly_launches_Braswell_processors.html|title=Intel quietly launches Braswell processors|first=Anthony|last=Shvets|date=March 31, 2015|publisher=CPU World}}</ref>|mem=2 × DDR3L-1600|vmin=|vmax=|tdp=6|sdp=|sock1=FC-BGA 1170|date=January 2016|price=$107|links=1
  |sspec1=SR2KR|step1=D1|part1=FH8066501715934}}
{{cpulist|silvermont|baytrail|model=Celeron J3160|ark=91533|cores=4|mult=19.2|burst=2.24|gfxmodel=400
|gfxclock=320-700|l2=2|mem=2 × DDR3L-1600|vmin=|vmax=|tdp=6|sdp=|sock1=FC-BGA 1170|date=January 2016|price=$107
  |sspec1=SR2KS|step1=D1|part1=FH8066501715935}}
{{end}}

=== Haswell based Celerons ===

==== "[[Haswell (microarchitecture)|Haswell-DT]]" (22 nm) ====
* All models support: ''[[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[SSSE3]], SSE4.1, SSE4.2, Enhanced Intel [[Engineering:SpeedStep|SpeedStep]] Technology (EIST), Intel 64, XD bit (an [[NX bit]] implementation), Intel VT-x, Smart Cache.''
* Haswell Celerons support Quick Sync.
* Haswell-R Celerons G1840, G1850, and G1840T also support ''[[Engineering:WiDi|Intel Wireless Display]]''.
* Transistors: 1.4 billion
* [[Engineering:Die (integrated circuit)|Die]] size: 177&nbsp;mm<sup>2</sup>
* All models support [[ECC memory]].
{{cpulist|haswell|haswell|model=Celeron G1820|ark=78955
|cores=2|l3=2|mult=27|turbo={{n/a}}|gfxmodel=10eu|gfxclock=350–1050|tdp=53|date=January 2014|price=$42|links=1
|sspec1=SR1CN|step1=C0|sock=1150|part1=CM8064601483405|part2=BX80646G1820|part3=BXC80646G1820}}
{{cpulist|haswell|haswell|model=Celeron G1830|ark=78954
|cores=2|l3=2|mult=28|turbo={{n/a}}|gfxmodel=10eu|gfxclock=350–1050|tdp=53|date=January 2014|price=$52
|sspec1=SR1NC|step1=C0|sock=1150|part1=CM8064601483404|part2=BX80646G1830|part3=BXC80646G1830}}
{{cpulist|haswell|haswell|model=Celeron G1840|ark=80800
|cores=2|l3=2|mult=28|turbo={{n/a}}|gfxmodel=10eu|gfxclock=350–1050|tdp=53|date=May 2014|price=$42
|sspec1=SR1VK|step1=C0|sock=1150|part1=CM8064601483439|part2=BX80646G1840|part3=BXC80646G1840}}
{{cpulist|haswell|haswell|model=Celeron G1850|ark=80798
|cores=2|l3=2|mult=29|turbo={{n/a}}|gfxmodel=10eu|gfxclock=350–1050|tdp=53|date=May 2014|price=$52
|sspec1=SR1KH|step1=C0|sock=1150|part1=CM8064601483406|part2=BX80646G1850|part3=BXC80646G1850}}
{{cpulist|haswell|haswell|model=Celeron G1820T|ark=78956
|cores=2|l3=2|mult=24|turbo={{n/a}}|gfxmodel=10eu|gfxclock=200–1050|tdp=35|date=January 2014|price=$42
|sspec1=SR1CP|step1=C0|sock=1150|part1=CM8064601482617}}
{{cpulist|haswell|haswell|model=Celeron G1840T|ark=80801
|cores=2|l3=2|mult=25|turbo={{n/a}}|gfxmodel=10eu|gfxclock=200–1050|tdp=35|date=May 2014|price=$42
|sspec1=SR1KA|step1=C0|sock=1150|part1=CM8064601482618|part2=|part3=}}
{{cpulist|haswell|haswell|model=Celeron G1820TE|ark=78957
|cores=2|l3=2|mult=22|turbo={{n/a}}|gfxmodel=10eu|gfxclock=200–1000|tdp=35|date=January 2014|price=$42
|sspec1=SR182|sspec2=SR1T6|step1=C0|step2=C0|sock=1150|part1=CM8064601484601|part2=CM8064601618705}}
{{end}}

=== Skylake based Celerons ===

==== "[[Skylake (microarchitecture)|Skylake-S]]" (14 nm) ====
* All models support: ''[[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[SSSE3]], SSE4.1, SSE4.2, Enhanced Intel [[Engineering:SpeedStep|SpeedStep]] Technology (EIST), Intel 64, XD bit (an [[NX bit]] implementation), Intel VT-x, Intel VT-d, [[AES instruction set|AES-NI]], Smart Cache.''
* All models support up to DDR3-1600 or DDR4-2133 memory.
* All models support ECC memory.
* Transistors: TBD
* [[Engineering:Die (integrated circuit)|Die]] size: TBD
{{cpulist|skylake|skylake|model=Celeron G3900|ark=90741
|cores=2|threads=2|l3=2|mult=28|turbo={{n/a}}|gfxmodel=510|gfxclock=350–950|tdp=51|date=January 2016|price=$42|links=1
|sspec1=SR2HV|step1=S0|sock=1151|part1=BX80662G3900|part2=CM8066201928610}}
{{cpulist|skylake|skylake|model=Celeron G3920|ark=90737
|cores=2|threads=2|l3=2|mult=29|turbo={{n/a}}|gfxmodel=510|gfxclock=350–950|tdp=51|date=January 2016|price=$52
|sspec1=SR2HX|step1=S0|sock=1151|part1=BX80662G3920|part2=CM8066201928609}}
{{cpulist|skylake|skylake|model=Celeron G3900T|ark=90738
|cores=2|threads=2|l3=2|mult=26|turbo={{n/a}}|gfxmodel=510|gfxclock=350–950|tdp=35|date=January 2016|price=$42
|sspec1=SR2HT|step1=S0|sock=1151|part1=CM8066201928505}}
{{cpulist|skylake|skylake|model=Celeron G3900E|ark=90713
|cores=2|threads=2|l3=2|mult=24|turbo={{n/a}}|gfxmodel=510|gfxclock=350–950|tdp=35|date=January 2016|price=$107
|sspec1=SR2GH|step1=R0|sock=1440|part1=CL8066201939703|part2=}}
{{cpulist|skylake|skylake|model=Celeron G3900TE|ark=90711
|cores=2|threads=2|l3=2|mult=23|turbo={{n/a}}|gfxmodel=510|gfxclock=350–950|tdp=35|date=January 2016|price=$42
|sspec1=SR2LU|step1=R0|sock=1151|part1=CM8066201938802|part2=}}
{{cpulist|skylake|skylake|model=Celeron G3902E|ark=90619
|cores=2|threads=2|l3=2|mult=16|turbo={{n/a}}|gfxmodel=510|gfxclock=350–950|tdp=25|date=January 2016|price=$107
|sspec1=SR2GJ|step1=R0|sock=1440|part1=CL8066202400204|part2=}}
{{end}}

=== Goldmont based Celerons ===

===="[[Engineering:Goldmont|Apollo Lake]]" (14 nm)====
* All models support: [[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[SSSE3]], SSE4.1, SSE4.2, Enhanced Intel [[Engineering:SpeedStep|SpeedStep]] Technology (EIST), Intel 64, XD bit (an [[NX bit]] implementation), Intel VT-x, Intel VT-d, [[AES instruction set|AES-NI]], [[Engineering:Trusted Execution Technology|TXT/TXE]]
* Package size: 24&nbsp;mm × 31&nbsp;mm
* DDR3L/LPDDR3/LPDDR4 dual-channel memory controller supporting up to 8 GB
* Display controller with 1 MIPI DSI port and 2 DDI ports (eDP 1.3, DP 1.1a, or HDMI 1.4b)
* Integrated Intel [[Engineering:List of Intel graphics processing units#Gen9|HD Graphics (Gen9)]] GPU
* PCI Express 2.0 controller supporting 6 lanes (3 dedicated and 3 multiplexed with USB 3.0); 4 lanes available externally
* Two USB 3.0 ports (1 dual role, 1 dedicated, 3 multiplexed with PCI Express 2.0 and 1 multiplexed with one SATA-300 port)
* Two USB 2.0 ports
* Two SATA-600 ports (one multiplexed with USB 3.0)
* Integrated HD audio controller
* Integrated image signal processor supporting four MIPI CSI ports and 13 MP sensors
* Integrated memory card reader supporting SDIO 3.01 and eMMC 5.0
* Serial I/O supporting SPI, HSUART (serial port) and I2C
{{cpulist|silvermont|baytrail|model=Celeron J3355|ark=95597|cores=2|mult=24|burst=2.5|gfxmodel=500
|gfxclock=250-700|l2=2|mem=2 × DDR3L-1866<br />2 × LPDDR4-2400|vmin=|vmax=|tdp=10|sdp=|sock1=FC-BGA 1296|date=September 2016|price=$107|links=1
  |sspec1=SR2Z8|step1=B1|part1=FH8066802986000|sspec2=SREKJ|step2=F1}}
{{cpulist|silvermont|baytrail|model=Celeron J3455|ark=95594|cores=4|mult=18|burst=2.3|gfxmodel=500
|gfxclock=250-700|l2=2|mem=2 × DDR3L-1866<br />2 × LPDDR4-2400|vmin=|vmax=|tdp=10|sdp=|sock1=FC-BGA 1296|date=September 2016|price=$107
  |sspec1=SR2Z9|step1=B1|part1=FH8066802986102|sspec2=SREKK|step2=F1}}
{{end}}

=== Goldmont Plus based Celerons ===

===="[[Engineering:Goldmont Plus|Gemini Lake]]" (14 nm)====
* All models support: ''[[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[SSSE3]], SSE4.1, SSE4.2, Enhanced Intel [[Engineering:SpeedStep|SpeedStep]] Technology (EIST), Intel 64, XD bit (an [[NX bit]] implementation), Intel SGX, Intel VT-x, Intel VT-d, [[AES instruction set|AES-NI]]''.
* GPU and memory controller are integrated onto the processor die
* GPU is based on Kaby Lake [[Engineering:Intel HD Graphics|Intel HD Graphics]], with 12 execution units, and supports DirectX 12, OpenGL 4.5, OpenGL ES 3.0 and OpenCL 2.0 (on Windows).
* Package size: 25&nbsp;mm × 24&nbsp;mm
{{cpulist|silvermont|baytrail|model=Celeron J4005|ark=128992|cores=2|mult=24|burst=2.7|gfxmodel=600
|gfxclock=250-700|l2=4|mem=2 × LPDDR4-2400|vmin=|vmax=|tdp=10|sdp=|sock1=FC-BGA 1090|date=December 2017|price=$107|links=1
  |sspec1=SR3S5|step1=B0|part1=FH8068003067416}}
{{cpulist|silvermont|baytrail|model=Celeron J4105|ark=128989|cores=4|mult=18|burst=2.5|gfxmodel=600
|gfxclock=250-750|l2=4|mem=2 × LPDDR4-2400|vmin=|vmax=|tdp=10|sdp=|sock1=FC-BGA 1090|date=December 2017|price=$107
  |sspec1=SR3S4|step1=B0|part1=FH8068003067403}}
{{end}}

===="[[Engineering:Goldmont Plus|Gemini Lake Refresh]]" (14 nm)====
* All models support: ''[[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[SSSE3]], SSE4.1, SSE4.2, Enhanced Intel [[Engineering:SpeedStep|SpeedStep]] Technology (EIST), Intel 64, XD bit (an [[NX bit]] implementation), Intel SGX, Intel VT-x, Intel VT-d, [[AES instruction set|AES-NI]]''.
* GPU and memory controller are integrated onto the processor die
* GPU is based on Kaby Lake [[Engineering:Intel HD Graphics|Intel HD Graphics]], with 12 execution units, and supports DirectX 12, OpenGL 4.5, OpenGL ES 3.0 and OpenCL 2.0 (on Windows).
* Package size: 25&nbsp;mm × 24&nbsp;mm
{{cpulist|silvermont|baytrail|model=Celeron J4025|ark=197307|cores=2|mult=24|burst=2.9|gfxmodel=600
|gfxclock=250-700|l2=4|mem=2 × LPDDR4-2400|vmin=|vmax=|tdp=10|sdp=|sock1=FC-BGA 1090|date=November 2019|price=$107|links=1
  |sspec1=SRET3|step1=R0|part1=FH8068003067428}}
{{cpulist|silvermont|baytrail|model=Celeron J4125|ark=197305|cores=4|mult=24|burst=2.7|gfxmodel=600
|gfxclock=250-750|l2=4|mem=2 × LPDDR4-2400|vmin=|vmax=|tdp=10|sdp=|sock1=FC-BGA 1090|date=November 2019|price=$107
  |sspec1=SRGZS|step1=R0|part1=FH8068003067410}}
{{end}}

=== Kaby Lake based Celerons ===

==== "Kaby Lake-S" (14 nm) ====
* All models support: ''[[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[SSSE3]], SSE4.1, SSE4.2, Enhanced Intel [[Engineering:SpeedStep|SpeedStep]] Technology (EIST), Intel 64, XD bit (an [[NX bit]] implementation), Intel VT-x, Intel VT-d, [[AES instruction set|AES-NI]], Smart Cache.''
* All models support up to DDR3-1600 or DDR4-2400 memory (DDR4-2133 for embedded models).
* All models support ECC memory.
* Transistors: TBD
* [[Engineering:Die (integrated circuit)|Die]] size: TBD
{{cpulist|skylake|skylake|model=Celeron G3930|ark=97452
|cores=2|threads=2|l3=2|mult=29|turbo={{n/a}}|gfxmodel=610|gfxclock=350–1050|tdp=51|date=January 2017|price=$42|links=1
|sspec1=SR35K|step1=S0|sock=1151|part1=BX80677G3930|part2=BXC80677G3930}}
{{cpulist|skylake|skylake|model=Celeron G3950|ark=97451
|cores=2|threads=2|l3=2|mult=30|turbo={{n/a}}|gfxmodel=610|gfxclock=350–1050|tdp=51|date=January 2017|price=$52
|sspec1=SR35J|step1=S0|sock=1151|part1=BX80677G3950|part2=}}
{{cpulist|skylake|skylake|model=Celeron G3930T|ark=97467
|cores=2|threads=2|l3=2|mult=26|turbo={{n/a}}|gfxmodel=610|gfxclock=350–1000|tdp=35|date=January 2017|price=$42
|sspec1=SR35V|step1=S0|sock=1151|part1=CM8067703016211}}
{{cpulist|skylake|skylake|model=Celeron G3930E|ark=122824
|cores=2|threads=2|l3=2|mult=29|turbo={{n/a}}|gfxmodel=610|gfxclock=350–1000|tdp=54|date=June 2017|price=$42
|sspec1=SR38G|step1=B0|sock=1151|part1=CM8067703318802}}
{{cpulist|skylake|skylake|model=Celeron G3930TE|ark=122825
|cores=2|threads=2|l3=2|mult=27|turbo={{n/a}}|gfxmodel=610|gfxclock=350–950|tdp=35|date=June 2017|price=$42
|sspec1=SR38H|step1=B0|sock=1151|part1=CM8067703318900}}
{{end}}

=== [[Coffee Lake|Coffee Lake based Celerons]] ===
==== "Coffee Lake-S" (14 nm) ====

{{cpulist|skylake|skylake|model=Celeron G4900|ark=129487|cores=2|threads=2|l3=2|mult=31|turbo={{n/a}}|gfxmodel=U610|gfxclock=350–1050|tdp=54|date=April 2018|price=$42|sspec1=SR3W4|step1=B0|sock=1151|part1=CM8068403378112|part2=BX80684G4900|part3=BXC80684G4900}}
{{cpulist|skylake|skylake|model=Celeron G4920|ark=129950|cores=2|threads=2|l3=2|mult=32|turbo={{n/a}}|gfxmodel=U610|gfxclock=350–1050|tdp=54|date=April 2018|price=$52|sspec1=SR3YL|step1=B0|sock=1151|part1=CM8068403378011|part2=BX80684G4920|part3=}}
{{cpulist|skylake|skylake|model=Celeron G4930|ark=134878|cores=2|threads=2|l3=2|mult=32|turbo={{n/a}}|gfxmodel=U610|gfxclock=350–1050|tdp=54|date=April 2019|price=$42|sspec1=SR3YN|step1=B0|sock=1151|part1=CM8068403378114|part2=|part3=}}
{{cpulist|skylake|skylake|model=Celeron G4950|ark=134879|cores=2|threads=2|l3=2|mult=33|turbo={{n/a}}|gfxmodel=U610|gfxclock=350–1050|tdp=54|date=April 2019|price=$52|sspec1=SR3YM|step1=B0|sock=1151|part1=CM8068403378012|part2=|part3=}}
{{cpulist|skylake|skylake|model=Celeron G4900T|ark=129952|cores=2|threads=2|l3=2|mult=29|turbo={{n/a}}|gfxmodel=U610|gfxclock=350–1000|tdp=35|date=April 2018|price=$42|sspec1=SR3YP|step1=B0|sock=1151|part1=CM8068403379312|part2=|part3=}}
{{cpulist|skylake|skylake|model=Celeron G4930T|ark=134868|cores=2|threads=2|l3=2|mult=30|turbo={{n/a}}|gfxmodel=U610|gfxclock=350–1000|tdp=35|date=April 2019|price=$42|sspec1=SR3YQ|step1=B0|sock=1151|part1=CM8068403379313|part2=|part3=}}
{{end}}

==== "Coffee Lake-H" (14 nm) ====
{{cpulist|skylake|skylake|model=Celeron G4930E|ark=195332|cores=2|threads=2|l3=2|mult=24|turbo={{n/a}}|gfxmodel=U610|gfxclock=350–1050|tdp=35|date=June 2019|price=$107|sspec1=SRFEE|step1=U0|sock=1440|part1=CL8068404164900|part2=|part3=}}
{{cpulist|skylake|skylake|model=Celeron G4932E|ark=195330|cores=2|threads=2|l3=2|mult=19|turbo={{n/a}}|gfxmodel=U610|gfxclock=350–1050|tdp=25|date=June 2019|price=$107|sspec1=SRFEL|step1=U0|sock=1440|part1=CL8068404165500|part2=|part3=}}
{{end}}

=== [[Engineering:Comet Lake|Comet Lake based Celerons]] ===
==== "Comet Lake-S" (14 nm) ====
{{cpulist|skylake|skylake|model=Celeron G5900|ark=199268|cores=2|threads=2|l3=2|mult=34|turbo={{n/a}}|gfxmodel=U610|gfxclock=350–1050|tdp=58|date=April 2020|price=$42|sspec1=SRH44|step1=G1|sock=1200|part1=BX80701G5900|part2=BXC80701G5900|part3=CM8070104292110}}
{{cpulist|skylake|skylake|model=Celeron G5905|ark=201899|cores=2|threads=2|l3=4|mult=35|turbo={{n/a}}|gfxmodel=U610|gfxclock=350–1050|tdp=58|date=July 2020|price=$42|sspec1=SRK27|step1=G1|sock=1200|part1=BX80701G5905|part2=CM8070104292115}}
{{cpulist|skylake|skylake|model=Celeron G5920|ark=199290|cores=2|threads=2|l3=2|mult=35|turbo={{n/a}}|gfxmodel=U610|gfxclock=350–1050|tdp=58|date=April 2020|price=$52|sspec1=SRH42|step1=G1|sock=1200|part1=BX80701G5920|part2=BXC80701G5920|part3=CM8070104292010}}
{{cpulist|skylake|skylake|model=Celeron G5925|ark=201887|cores=2|threads=2|l3=4|mult=36|turbo={{n/a}}|gfxmodel=U610|gfxclock=350–1050|tdp=58|date=July 2020|price=$52|sspec1=SRK26|step1=G1|sock=1200|part1=BX80701G5925|part2=CM8070104292013}}
{{cpulist|skylake|skylake|model=Celeron G5900E|ark=203897|cores=2|threads=2|l3=2|mult=32|turbo={{n/a}}|gfxmodel=U610|gfxclock=350–1000|tdp=58|date=April 2020|price=$44|sspec1=SRH7T|step1=G1|sock=1200|part1=CM8070104424111|part2=|part3=}}
{{cpulist|skylake|skylake|model=Celeron G5900T|ark=199270|cores=2|threads=2|l3=2|mult=32|turbo={{n/a}}|gfxmodel=U610|gfxclock=350–1000|tdp=35|date=April 2020|price=$42|sspec1=SRH46|step1=G1|sock=1200|part1=CM8070104292207|part2=|part3=}}
{{cpulist|skylake|skylake|model=Celeron G5905T|ark=201886|cores=2|threads=2|l3=4|mult=33|turbo={{n/a}}|gfxmodel=U610|gfxclock=350–1000|tdp=35|date=July 2020|price=$42|sspec1=SRK28|step1=G1|sock=1200|part1=CM8070104292213|part2=|part3=}}
{{cpulist|skylake|skylake|model=Celeron G5900TE|ark=203890|cores=2|threads=2|l3=2|mult=30|turbo={{n/a}}|gfxmodel=U610|gfxclock=350–1000|tdp=35|date=April 2020|price=$44|sspec1=SRH6J|step1=G1|sock=1200|part1=CM8070104424010|part2=|part3=}}
{{end}}

=== Tremont based Celerons ===

===="[[Engineering:Tremont (microarchitecture)|Jasper Lake]]" (10 nm)====
* All models support: ''[[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[SSSE3]], SSE4.1, SSE4.2, Enhanced Intel [[Engineering:SpeedStep|SpeedStep]] Technology (EIST), Intel 64, XD bit (an [[NX bit]] implementation), Intel SGX, Intel VT-x, Intel VT-d, [[AES instruction set|AES-NI]]'', Intel SHA Extensions, Intel SGX, [[Supervisor Mode Access Prevention|SMAP/SMEP]]
* Package size: 35 mm x 24 mm
* DDR4/LPDDR4 dual-channel memory controller supporting up to 16 GB
* Display controller with 1 MIPI DSI 1.2 port and 3 DDI ports (eDP 1.4b, MIPI DSI 1.2, DP 1.4a, or HDMI 2.0b)
* Integrated Intel [[Engineering:List of Intel graphics processing units#Gen11|HD Graphics (Gen11)]] GPU
* PCI Express 3.0 controller supporting 8 lanes (multiplexed); 4 lanes available externally
* Two USB 3.2 2x1 ports (a.k.a. USB 3.1)
* Four USB 3.2 1x1 ports (a.k.a. USB 3.0)
* Eight USB 2.0 ports
* Two SATA-600 ports
* Integrated HD audio controller
* Integrated image signal processor supporting four cameras (three concurrent)
* Integrated memory card reader supporting SDIO 3.0 and eMMC 5.1
* Serial I/O supporting SPI, HSUART (serial port) and I2C
* Integrated CNVi with Wi-Fi 6 (IEEE 802.11ax 1x1 and 2x2) and Bluetooth 5.x (using UART/I2S/USB2)
{{cpulist|tremont|jasperlake|model=Celeron N4505|ark=212324|cores=2|freq=2.0|burst=2.9|gfxmodel=UHD Graphics (16 EUs)
|gfxclock=450-750|l2=1.5|l3=4|mem=2 × DDR4/LPDDR4X-2933|vmin=|vmax=|tdp=10|sock1=FC-BGA 1338|date=January 2021|price=|links=1
  |sspec1=SRKGW|step1=A1|part1=DC8069704609809}}
{{cpulist|tremont|jasperlake|model=Celeron N5105|ark=212328|cores=4|freq=2.0|burst=2.9|gfxmodel=UHD Graphics (24 EUs)
|gfxclock=450-800|l2=1.5|l3=4|mem=2 × DDR4/LPDDR4X-2933|vmin=|vmax=|tdp=10|sock1=FC-BGA 1338|date=January 2021|price=
  |sspec1=SRKGV|step1=A1|part1=DC8069704609808}}
{{end}}

== Mobile processors ==

=== P6 based Celerons ===

==== Mobile Celeron ''(single-core)'' ====

===== "Mendocino" (250 nm) =====
* All models support: ''[[MMX (instruction set)|MMX]]''
{{cpulist|p6|mendocino|model=Mobile Celeron 266|ark=49970
|l2=128|fsb=66|mult=4|vmin=1.5|vmax=|tdp=9.8|date=January 1999|price=$106|links=1
|sspec1=SL3HM|step1=mcpA0|sock1=μPGA2|part1=KP80524KX266128
|sspec2=SL23Y|step2=mcbA0|sock2=BGA2|part2=KC80524KX266128}}
{{cpulist|p6|mendocino|model=Mobile Celeron 300|ark=49971
|l2=128|fsb=66|mult=4.5|vmin=1.6|vmax=|tdp=11.1|date=January 1999|price=$187
|sspec1=SL3HN|step1=mcpA0|sock1=μPGA2|part1=KP80524KX300128
|sspec2=SL3AH|step2=mcbA0|sock2=BGA2|part2=KC80524KX300128}}
{{cpulist|p6|mendocino|model=Mobile Celeron 333<ref>{{cite web|url=http://www.cpu-world.com/sspec/SL/SL3HP.html |title=Celeron 333(PGA) |publisher=Cpu-world.com |date=2016-03-07 |access-date=2016-04-21}}</ref><ref>{{cite web|url=http://www.cpu-world.com/sspec/SL/SL3C8.html |title=Celeron 333(BGA) |publisher=Cpu-world.com |date=2016-03-07 |access-date=2016-04-21}}</ref>|ark=
|l2=128|fsb=66|mult=5|vmin=1.6|vmax=|tdp=11.8|date=April 1999|price=$159
|sspec1=SL3HP|step1=mcpA0|sock1=μPGA2|part1=KP80524KX333128
|sspec2=SL3C8|step2=mcbA0|sock2=BGA2|part2=KC80524KX333128}}
{{cpulist|p6|mendocino|model=Mobile Celeron 366|ark=47673
|l2=128|fsb=66|mult=5.5|vmin=1.6|vmax=|tdp=13.1|date=May 1999|price=$170
|sspec1=SL3HQ|step1=mcpA0|sock1=μPGA2|part1=KP80524KX366128
|sspec2=SL3C7|step2=mcbA0|sock2=BGA2|part2=KC80524KX366128}}
{{cpulist|p6|mendocino|model=Mobile Celeron 400|ark=49972
|l2=128|fsb=66|mult=6|vmin=1.6|vmax=|tdp=13.8|date=June 1999|price=$187
|sspec1=SL3GR|step1=mcpA0|sock1=μPGA2|part1=KP80524KX400128
|sspec2=SL3GQ|step2=mcbA0|sock2=BGA2|part2=KC80524KX400128}}
{{cpulist|p6|mendocino|model=Mobile Celeron 433|ark=49973
|l2=128|fsb=66|mult=6.5|vmin=1.9|vmax=|tdp=19.4|date=September 1999|price=$159
|sspec1=SL3KB|step1=mcpA0|sock1=μPGA2|part1=KP80524KX433128
|sspec2=SL3KA|step2=mcbA0|sock2=BGA2|part2=KC80524KX433128}}
{{cpulist|p6|mendocino|model=Mobile Celeron 466|ark=49974
|l2=128|fsb=66|mult=7|vmin=1.9|vmax=|tdp=20.7|date=September 1999|price=$209
|sspec1=SL3KD|step1=mcpA0|sock1=μPGA2|part1=KP80524KX466128
|sspec2=SL3KC|step2=mcbA0|sock2=BGA2|part2=KC80524KX466128}}
{{cpulist|p6|mendocino|model=Mobile Celeron LV 266<ref>{{cite web|url=http://www.cpu-world.com/sspec/SL/SL3DQ.html |title=Celeron LV 266 |publisher=Cpu-world.com |date=2016-03-07 |access-date=2016-04-21}}</ref>|ark=
|l2=128|fsb=66|mult=4|vmin=1.5|vmax=|tdp=7.9|date=April 1999|price=|links=1
|sspec1=SL3DQ|step1=mcbA0|sock1=BGA2|part1=KC80524KX266128LP}}
{{end}}

===== "Coppermine-128" (180 nm)  {{anchor|"Coppermine-128" (standard-voltage, 180 nm)|"Coppermine-128" (low-voltage, 180 nm)|"Coppermine-128" (ultra-low-voltage, 180 nm)}} =====
* All models support: ''[[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]]''
{{cpulist|p6|coppermine|model=Mobile Celeron 450|ark=27321
|l2=128|fsb=100|mult=4.5|vmin=1.6|vmax=|tdp=15.5|date=February 2000|price=|links=1
|sspec1=SL3PF|step1=PA2|sock1=Socket 495|part1=KP80526NY450128
|sspec2=SL43U|step2=PB0|sock2=BGA2|part2=KC80526NY450128
|sspec3=SL4JS|step3=PC0
|sspec4=SL3PD|step4=BA2
|sspec=
* SL43T&nbsp;(BB0)
* SL4JC&nbsp;(BC0)
* SL4PT}}
{{cpulist|p6|coppermine|model=Mobile Celeron 500|ark=27322
|l2=128|fsb=100|mult=5|vmin=1.6|vmax=|tdp=16.8|date=February 2000|price=
|sspec1=SL3PE|step1=PA2|sock1=Socket 495|part1=KP80526NY500128
|sspec2=SL43R|step2=PB0|sock2=BGA2|part2=KC80526NY500128
|sspec3=SL46Y|step3=PC0
|sspec4=SL4JT|step4=PC0
|sspec=
* SL4PV&nbsp;(PC0)
* SL3PC&nbsp;(BA2)
* SL43Q&nbsp;(BB0)
* SL4JD&nbsp;(BC0)
* SL45A&nbsp;(PB0)}}
{{cpulist|p6|coppermine|model=Mobile Celeron 550|ark=27323
|l2=128|fsb=100|mult=5.5|vmin=1.6|vmax=|tdp=18.4|date=April 2000|price=
|sspec1=SL3ZF|step1=PB0|sock1=Socket 495|part1=KP80526NY550128
|sspec2=SL4MT|step2=PB0|sock2=BGA2|part2=KC80526NY550128
|sspec3=SL4JU|step3=PC0
|sspec4=SL3ZE|step4=BB0
|sspec=* SL4JE (BC0)}}
{{cpulist|p6|coppermine|model=Mobile Celeron 600|ark=27324
|l2=128|fsb=100|mult=6|vmin=1.6|vmax=|tdp=13|date=June 2000|price=
|sspec1=SL4AP|step1=PB0|sock1=Socket 495|part1=KP80526NY600128
|sspec2=SL4JV|step2=PC0|sock2=BGA2|part2=KC80526NY600128
|sspec3=SL4MU|step3=PC0
|sspec4=SL4PW|step4=PC0
|sspec=
* SL4AR&nbsp;(BC0)
* SL4JF&nbsp;(BC0)
* SL582
* SL5DS}}
{{cpulist|p6|coppermine|model=Mobile Celeron 650|ark=27325
|l2=128|fsb=100|mult=6.5|vmin=1.6|vmax=|tdp=14|date=June 2000|price=
|sspec1=SL4AE|step1=PB0|sock1=Socket 495|part1=KP80526NY650128
|sspec2=SL4MV|step2=PB0|sock2=BGA2|part2=KC80526NY650128
|sspec3=SL4JW|step3=PC0
|sspec4=SL4PX|step4=PC0
|sspec=
* SL4AD&nbsp;(BB0)
* SL4JG&nbsp;(BC0)}}
{{cpulist|p6|coppermine|model=Mobile Celeron 700|ark=27326
|l2=128|fsb=100|mult=7|vmin=1.6|vmax=|tdp=15|date=September 2000|price=
|sspec1=SL4GX|step1=PC0|sock1=Socket 495|part1=KP80526NY700128
|sspec2=SL4PY|step2=PC0|sock2=BGA2|part2=KC80526NY700128
|sspec3=SL53D|step3=PD0
|sspec4=SL4GU|step4=BC0
|sspec=* SL53V&nbsp;(BD0)}}
{{cpulist|p6|coppermine|model=Mobile Celeron 750|ark=27328
|l2=128|fsb=100|mult=7.5|vmin=1.6|vmax=|tdp=15.8|date=March 2001|price=
|sspec1=SL55Q|step1=PC0|sock1=Socket 495|part1=KP80526NY750128
|sspec2=SL56Q|step2=PC0|sock2=BGA2|part2=KC80526NY750128
|sspec3=SL53C|step3=PD0
|sspec4=SL58K|step4=PD0
|sspec=
* SL56P&nbsp;(BC0)
* SL53U&nbsp;(BD0)}}
{{cpulist|p6|coppermine|model=Mobile Celeron 800|ark=27329
|l2=128|fsb=100|mult=8|vmin=1.6|vmax=|tdp=17.6|date=May 2001|price=
|sspec1=SL584|step1=PD0|sock1=Socket 495|part1=KP80526NY800128
|sspec2=SL5CB|step2=PD0|sock2=BGA2|part2=KC80526NY800128
|sspec3=SL57X|step3=BD0}}
{{cpulist|p6|coppermine|model=Mobile Celeron 850|ark=27331
|l2=128|fsb=100|mult=8.5|vmin=1.6|vmax=|tdp=18.8|date=July 2001|price=
|sspec1=SL585|step1=PD0|sock1=Socket 495|part1=KP80526NY850128
|sspec2=SL57Y|step2=BD0|sock2=BGA2|part2=KC80526NY850128}}
{{cpulist|p6|coppermine|model=Mobile Celeron 900|ark=27333
|l2=128|fsb=100|mult=9|vmin=1.7|vmax=|tdp=24|date=October 2001|price=
|sspec1=SL5PY|step1=PD0|sock1=Socket 495|part1=KP80526NY900128
|sspec2=SL5PX|step2=BD0|sock2=BGA2|part2=KC80526NY900128}}
{{cpulist|p6|coppermine|model=Mobile Celeron LV 400|ark=27335
|l2=128|fsb=100|mult=4|vmin=1.35|vmax=|tdp=6.5|date=February 2000|price=|links=1
|sspec1=SL3UL|step1=BA2|sock1=BGA2|part1=KC80526LY400128
|sspec2=SL43W|step2=BB0
|sspec3=SL4J8|step3=BC0
|sspec4=SL544|step4=PD0}}
{{cpulist|p6|coppermine|model=Mobile Celeron LV 500<ref>{{cite web|url=http://www.cpu-world.com/sspec/SL/SL43Z.html |title=Celeron LV 500(BB0) |publisher=Cpu-world.com |date=2016-03-07 |access-date=2016-04-21}}</ref><ref>{{cite web|url=http://www.cpu-world.com/sspec/SL/SL543.html |title=Celeron LV 500(PD0) |publisher=Cpu-world.com |date=2016-03-07 |access-date=2016-04-21}}</ref><ref>{{cite web|url=http://www.x86-guide.com/en/cpu/Intel-Celeron-500-Mobile-LV-cpu-no3025.html |title=Celeron LV 500 |publisher=X86-guide.com |access-date=2016-04-21}}</ref>|ark=27322
|l2=128|fsb=100|mult=5|vmin=1.35|vmax=|tdp=12.2|date=June 2000|price=
|sspec1=SL45A|step1=BB0|sock1=BGA2|part1=KC80526LY500128
|sspec2=SL4J9|step2=BC0
|sspec3=SL543|step3=PD0}}
{{cpulist|p6|coppermine|model=Mobile Celeron LV 600<ref>{{cite web|url=http://www.cpu-world.com/sspec/SL/SL582.html |title=Celeron LV 600(BD0) |publisher=Cpu-world.com |date=2016-03-07 |access-date=2016-04-21}}</ref><ref>{{cite web|url=http://www.x86-guide.com/en/cpu/Intel-Celeron-600-Mobile-LV-cpu-no3027.html |title=Celeron LV 600 |publisher=X86-guide.com |access-date=2016-04-21}}</ref>|ark=27324
|l2=128|fsb=100|mult=6|vmin=1.35|vmax=|tdp=14.4|date=May 2001|price=
|sspec1=SL582|step1=BD0|sock1=BGA2|part1=KC80526LY600128}}
{{cpulist|p6|coppermine|model=Mobile Celeron ULV 500<ref>{{cite web|url=http://www.cpu-world.com/sspec/SL/SL4ZR.html |title=Celeron ULV 500(BC0) |publisher=Cpu-world.com |access-date=2016-04-21}}</ref><ref>{{cite web|url=http://www.cpu-world.com/sspec/SL/SL5DR.html |title=Celeron ULV 500(BD0) |publisher=Cpu-world.com |date=2016-03-07 |access-date=2016-04-21}}</ref><ref>{{cite web|url=http://www.x86-guide.com/en/cpu/Intel-Celeron-500-Mobile-ULV-cpu-no3026.html |title=Mobile Celeron ULV 500 |publisher=X86-guide.com |access-date=2016-04-21}}</ref>|ark=27322
|l2=128|fsb=100|mult=5|vmin=1.1|vmax=|tdp=8.1|date=January 2001|price=|links=1
|sspec1=SL4ZR|step1=BC0|sock1=BGA2|part1=KC80526LL500128
|sspec2=SL5DR|step2=BD0}}
{{cpulist|p6|coppermine|model=Mobile Celeron ULV 600<ref>{{cite web|url=http://www.cpu-world.com/sspec/SL/SL5DS.html |title=Celeron ULV 600 |publisher=Cpu-world.com |date=2016-03-07 |access-date=2016-04-21}}</ref><ref>{{cite web|url=http://www.cpu-world.com/sspec/SL/SL5V5.html |title=Celeron ULV 600(BD0) |publisher=Cpu-world.com |date=2016-03-07 |access-date=2016-04-21}}</ref><ref>{{cite web|url=http://www.cpu-world.com/sspec/SL/SL5DS.html |title=Celeron ULV 600 (OEM) |publisher=Cpu-world.com |date=2016-03-07 |access-date=2016-04-21}}</ref>|ark=27324
|l2=128|fsb=100|mult=6|vmin=1.1|vmax=|tdp=9.7|date=May 2001|price=
|sspec1=SL5DS|step1=BD0|sock1=BGA2|part1=KC80526LL600128
|sspec2=SL5V5|step2=BD0}}
{{end}}

===== "Coppermine T" (180 nm) =====
* All models support: ''[[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]]''
{{cpulist|p6|copperminet|model=Mobile Celeron 733|ark=27327
|l2=128|fsb=133|mult=5.5|vmin=1.7|vmax=|tdp=20.6|date=October 2001|price=|links=1
|sspec1=SL5SS|step1=FPD0|sock1=Socket 495|part1=RH80533NZ733128
|sspec2=SL5T4|step2=FPD0|sock2=BGA2|part2=KW80533NZ733128
|sspec3=SL5SP|step3=FBD0}}
{{cpulist|p6|copperminet|model=Mobile Celeron 800A|ark=27330
|l2=128|fsb=133|mult=6|vmin=1.7|vmax=|tdp=22|date=October 2001|price=
|sspec1=SL5ST|step1=FPD0|sock1=Socket 495|part1=RH80533NZ800128
|sspec2=SL5T3|step2=FPD0|sock2=BGA2|part2=KW80533NZ800128
|sspec3=SL5SQ|step3=FBD0}}
{{cpulist|p6|copperminet|model=Mobile Celeron 866|ark=27332
|l2=128|fsb=133|mult=6.5|vmin=1.7|vmax=|tdp=23.3|date=June 2001|price=
|sspec1=SL5Q3|step1=FPD0|sock1=Socket 495|part1=RH80533NZ866128
|sspec2=SL5T2|step2=FPD0|sock2=BGA2|part2=KW80533NZ866128
|sspec3=SL5Q2|step3=FBD0}}
{{cpulist|p6|copperminet|model=Mobile Celeron 933|ark=27334
|l2=128|fsb=133|mult=7|vmin=1.7|vmax=|tdp=20.6|date=June 2001|price=
|sspec1=SL5SK|step1=FPD0|sock1=Socket 495|part1=RH80533NZ933128
|sspec2=SL5SU|step2=FPD0|sock2=BGA2|part2=KW80533NZ933128
|sspec3=SL5SR|step3=FBD0}}
{{end}}

===== "Tualatin-256" (130 nm)  {{anchor|"Tualatin-256" (standard-voltage, 130 nm)|"Tualatin-256" (low-voltage, 130 nm)|"Tualatin-256" (ultra-low-voltage, 130 nm)}} =====
* All models support: ''[[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]]''
{| class="wikitable"
!Model Number ||sSpec Number ||Freq.
(MHz)
![[CPU cache#Multi-level caches|L2 Cache]]
(KB)
![[Engineering:Front-side bus|FSB]]
(MHz)
!Mult ||[[CPU core voltage|Voltage]]
(V)
![[Thermal design power|TDP]]
(W)
!Socket ||Release Date ||Part Number(s) ||Release
Price

({{wipe|United States dollar}})
|-
| colspan="12" style="text-align:left; background:#127cc1; color:white;"| '''standard voltage'''
|-
|[http://ark.intel.com/Product.aspx?id=27305 Mobile Celeron 1000] ||SL6B3 (B1)<br>SL693 (A1)<br>SL6AB (B1)<br>SL694 (A1) ||1000 || rowspan="6" |256 || rowspan="6" |133 ||7.5× ||1.40 ||22 ||PBGA 479<br>PPGA 478 ||Apr 17
2002
|RH80530NZ001256 ||
|-
|[http://ark.intel.com/Product.aspx?id=27306 Mobile Celeron 1066] ||SL6H7 (B1)<br>SL643 (A1)<br>SL64M (A1) ||1066 ||8× || rowspan="3" |1.45 ||23.2 || rowspan="5" |PPGA 478 || rowspan="3" |Jan 21
2002
|RH80530NZ004256 ||
|-
|[http://ark.intel.com/Product.aspx?id=27307 Mobile Celeron 1133] ||SL6H8 (B1)<br>SL642 (A1)<br>SL64L (A1) ||1133 ||8.5× ||23.8 ||RH80530NZ006256 ||
|-
|[http://ark.intel.com/Product.aspx?id=27308 Mobile Celeron 1200] ||SL6H9 (B1)<br>SL64K (A1)<br>SL63Z (A1) ||1200 ||9× ||24.4 ||RH80530NZ009256 ||
|-
|Mobile Celeron 1266<ref>{{cite web|url=http://www.cpu-world.com/sspec/SL/SL6Z9.html |title=Mobile Celeron 1266 (B1) |publisher=Cpu-world.com |date=2016-03-07 |access-date=2016-04-21}}</ref><ref>[http://www.x86-guide.com/en/cpu/Intel-Celeron-1266-Mobile-µ-FCPGA-cpu-no2647.html Mobile Celeron 1266]</ref> ||SL6Z9 (B1) ||1266 ||9.5× ||1.40 ||22 ||Apr 16
2003
|RH80530NZ012256 ||
|-
|[http://ark.intel.com/Product.aspx?id=27311 Mobile Celeron 1333]<ref>{{cite web|url=http://www.cpu-world.com/sspec/SL/SL6ZA.html |title=Mobile Celeron 1333(B1) |publisher=Cpu-world.com |date=2016-03-07 |access-date=2016-04-21}}</ref> ||SL6HA (B1)<br>SL6ZA (B1)<br>SL68J (A1) ||1333 ||10× ||1.5 ||19 ||Jun 24
2002
|RH80530WZ014256 ||
|-
| colspan="12" style="text-align:left; background:#127cc1; color:white;"| '''low voltage'''
|-
|[http://ark.intel.com/Product.aspx?id=27338 Mobile Celeron LV 650]<ref>{{cite web|url=http://www.x86-guide.com/en/cpu/Intel-Celeron-650-Mobile-LV-cpu-no2659.html |title=Mobile Celeron LV 650 |publisher=X86-guide.com |date=2001-10-01 |access-date=2016-04-21}}</ref> ||SL6B6 (B1)<br>SL5YA (A1) ||650 || rowspan="4" |256 ||100 ||6.5× || rowspan="4" |1.15 ||10.6 || rowspan="4" |PBGA 479 ||Oct 1
2001
|RJ80530MY650256 ||
|-
|Mobile Celeron LV 667<ref>{{cite web|url=http://www.cpu-world.com/sspec/SL/SL63D.html |title=Mobile Celeron LV 667 (A1) |publisher=Cpu-world.com |date=2016-03-07 |access-date=2016-04-21}}</ref><ref>{{cite web|url=http://www.x86-guide.com/en/cpu/Intel-Celeron-667-Mobile-LV-cpu-no2667.html |title=Mobile Celeron LV 667 |publisher=X86-guide.com |access-date=2016-04-21}}</ref> ||SL63D (A1) ||667 || rowspan="3" |133 ||5× || ||Sep 16
2002
|RJ80530MZ667256 ||
|-
|[http://ark.intel.com/Product.aspx?id=31827 Mobile Celeron LV 733]<ref>{{cite web|url=http://www.x86-guide.com/en/cpu/Intel-Celeron-733-Mobile-LV-cpu-no2663.html |title=Mobile Celeron LV 733 |publisher=X86-guide.com |access-date=2016-04-21}}</ref> ||SL6B4 (B1)<br>SL68M (A1) ||733 ||5.5× ||11.2 ||Apr 17
2002
|RJ80530MZ733256 ||
|-
|Mobile Celeron LV 866<ref>{{cite web|url=http://www.cpu-world.com/sspec/SL/SL6CY.html |title=Mobile Celeron LV 866(A1) |publisher=Cpu-world.com |date=2016-03-07 |access-date=2016-04-21}}</ref><ref>{{cite web|url=http://www.x86-guide.com/en/cpu/Intel-Celeron-866-Mobile-LV-cpu-no2666.html |title=Mobile Celeron LV 866 |publisher=X86-guide.com |date=2003-01-14 |access-date=2016-04-21}}</ref> ||SL6CY (B1) ||866 ||6.5× ||9.61 ||Jan 14
2003
|RJ80530MZ866256 ||
|-
| colspan="12" style="text-align:left; background:#127cc1; color:white;"| '''ultra-low voltage'''
|-
|[http://ark.intel.com/Product.aspx?id=27338 Mobile Celeron ULV 650]<ref>{{cite web|url=http://www.x86-guide.com/en/cpu/Intel-Celeron-650-Mobile-ULV-cpu-no2660.html |title=Mobile Celeron ULV 650 |publisher=X86-guide.com |date=2002-01-21 |access-date=2016-04-21}}</ref> ||SL6B8 (B1)<br>SL63F (A1)<br> ||650 || rowspan="4" |256 || rowspan="2" |100 ||6.5× || rowspan="4" |1.1 || rowspan="4" |7 || rowspan="4" |PBGA 479 ||Jan 21
2002
|RJ80530VY650256 ||
|-
|Mobile Celeron ULV 700<ref>{{cite web|url=http://www.cpu-world.com/sspec/SL/SL6CZ.html |title=Mobile Celeron ULV 700 (B1) |publisher=Cpu-world.com |date=2016-03-07 |access-date=2016-04-21}}</ref><ref>{{cite web|url=http://www.x86-guide.com/en/cpu/Intel-Celeron-700-Mobile-ULV-cpu-no2662.html |title=Mobile Celeron ULV 700 |publisher=X86-guide.com |date=2002-09-16 |access-date=2016-04-21}}</ref> ||SL6CZ (B1) ||700 ||7× || rowspan="2" |Sep 16
2002
|RJ80530VY700256 ||
|-
|Mobile Celeron ULV 733<ref>{{cite web|url=http://www.cpu-world.com/sspec/SL/SL6D2.html |title=Mobile Celeron ULV 733 (B1) |publisher=Cpu-world.com |date=2016-03-07 |access-date=2016-04-21}}</ref><ref>{{cite web|url=http://www.x86-guide.com/en/cpu/Intel-Celeron-733-Mobile-ULV-cpu-no2664.html |title=Mobile Celeron ULV 733 |publisher=X86-guide.com |access-date=2016-04-21}}</ref> ||SL6D2 (B1) ||733 || rowspan="2" |133 ||5.5× ||RJ80530VZ733256 ||
|-
|Mobile Celeron ULV 800<ref>{{cite web|url=http://www.cpu-world.com/sspec/SL/SL6D4.html |title=Mobile Celeron ULV 800 (B1) |publisher=Cpu-world.com |date=2016-03-07 |access-date=2016-04-21}}</ref><ref>{{cite web|url=http://www.x86-guide.com/en/cpu/Intel-Celeron-800-Mobile-ULV-cpu-no2665.html |title=Mobile Celeron ULV 800 |publisher=X86-guide.com |date=2003-01-14 |access-date=2016-04-21}}</ref> ||SL6D4 (B1) ||800 ||6× ||Jan 14
2003
|RJ80530VZ800256 ||
|}

===Netburst based Celerons===

====Mobile Celeron ''(single-core)''====

===== "[[Engineering:Celeron#Northwood-256|Northwood-256]]" (130 nm) =====
* All models support: ''[[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]]''
{| class="wikitable"
!Model Number ||sSpec Number ||Freq.
(GHz)
![[CPU cache#Multi-level caches|L2 Cache]]
(KB)
![[Engineering:Front-side bus|FSB]]
(MHz)
!Mult ||[[CPU core voltage|Voltage]]
(V)
![[Thermal design power|TDP]]
(W)
!Socket ||Release
Date
!Part Number(s) ||Release
Price

({{wipe|United States dollar}})
|-
|[http://ark.intel.com/Product.aspx?id=27309 Mobile Celeron 1.2] ||SL7MG (D1) ||1.2 || rowspan="10" |256 || rowspan="10" |400 ||12× || rowspan="10" |1.3 ||20.8 || rowspan="10" |PPGA 478 ||May 2002 ||RH80532NC009256 || 
|-
|[http://ark.intel.com/Product.aspx?id=27312 Mobile Celeron 1.4] ||SL6FM (B0)<br>SL6M4 (C1) ||1.4 ||14× || rowspan="5" |30 || rowspan="2" |Jun 24
2002
|RH80532NC017256 ||
|-
|[http://ark.intel.com/Product.aspx?id=27313 Mobile Celeron 1.5] ||SL6FN (B0)<br>SL6M5 (C1) ||1.5 ||15× ||RH80532NC021256 ||
|-
|[http://ark.intel.com/Product.aspx?id=27314 Mobile Celeron 1.6] ||SL6J2 (C1) ||1.6 ||16× || rowspan="3" |Sep 16
2002
|RH80532NC025256 ||
|-
|[http://ark.intel.com/Product.aspx?id=27315 Mobile Celeron 1.7] ||SL6J3 (C1)<br>SL6VG (D1) ||1.7 ||17× ||RH80532NC029256 ||
|-
|[http://ark.intel.com/Product.aspx?id=27316 Mobile Celeron 1.8] ||SL6J4 (C1)<br>SL6VH (D1) ||1.8 ||18× ||RH80532NC033256 ||
|-
|[http://ark.intel.com/Product.aspx?id=27317 Mobile Celeron 2.0] ||SL6QH (C1)<br>SL6VJ (D1) ||2.0 ||20× ||32 ||Jan 14
2003
|RH80532NC041256 ||
|-
|[http://ark.intel.com/Product.aspx?id=27318 Mobile Celeron 2.2] ||SL6ZW (C0)<br>SL73Y (D1)<br>SL8SB (D1)||2.2 ||22× || rowspan="3" |35 ||Apr 16
2003
|RH80532NC049256 ||
|-
|[http://ark.intel.com/Product.aspx?id=27319 Mobile Celeron 2.4] ||SL75J (D1) ||2.4 ||24× ||Jun 11
2003
|RH80532NC056256 ||
|-
|[http://ark.intel.com/Product.aspx?id=27320 Mobile Celeron 2.5] ||SL75T (D1) ||2.5 ||25× ||Nov 12
2003
|RH80532NC060256 ||
|}

===Pentium-M based Celerons===

====Celeron M ''(single-core)''====

===== "Banias-512" (130 nm) =====
* All models support: ''[[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]]''
{{cpulist|p6|banias|model=Celeron M 310|ark=27138
|l2=512|fsb=400|mult=12|volt=1.356 V|tdp=24.5|date=January 2004|price=|links=1
|sspec1=SL79T|step1=B2|sock1=Socket 479/FC-µBGA|part1=RJ80535NC009512
|sspec2=SL79S|step2=B2|sock2=Socket 479/FC-µPGA|part2=RH80535NC009512}}
{{cpulist|p6|banias|model=Celeron M 320|ark=27139
|l2=512|fsb=400|mult=13|volt=1.356 V|tdp=24.5|date=January 2004|price=$49
|sspec1=SL6NM|step1=B2|sock1=Socket 479/FC-µBGA|part1=RJ80535NC013512
|sspec2=SL8FM|step2=B1|sock2=Socket 479/FC-µBGA|part2=LE80535NC013512
|sspec3=SL6N7|step3=B0|sock3=Socket 479/FC-µPGA|part3=RH80535NC013512
|sspec4=SL76S|step4=C0|sock=* Socket 479/FC-µPGA|part4=RH80535NC0131M}}
{{cpulist|p6|banias|model=Celeron M 330|ark=27140
|l2=512|fsb=400|mult=14|volt=1.356 V|tdp=24.5|date=April 2004|price=
|sspec1=SL6NL|step1=B1|sock1=Socket 479/FC-µBGA|part1=RJ80535NC017512
|sspec2=SL6N6|step2=B2|sock2=Socket 479/FC-µPGA|part2=RH80535NC017512
|sspec3=SL76T|step3=C0|sock3=Socket 479/FC-µPGA|part3=RH80535NC0171M}}
{{cpulist|p6|banias|model=Celeron M 340|ark=27141
|l2=512|fsb=400|mult=15|volt=1.356 V|tdp=24.5|date=June 2004|price=
|sspec1=SL7MT|step1=B1|sock1=Socket 479/FC-µBGA|part1=RJ80535NC021512
|sspec2=SL7ME|step2=B1|sock2=Socket 479/FC-µPGA|part2=RH80535NC021512
|sspec3=SL6P6|step3=B2|sock3=Socket 479/FC-µPGA|part3=RH80535NC0211M}}
{{cpulist|p6|banias|model=Celeron M ULV 600|ark=37245
|l2=512|fsb=400|mult=6|volt=1.004 V|tdp=7|date=June 2004|price=|links=1
|sspec1=SL7GE|step1=B2|sock1=Socket 479/FC-µBGA|part1=RJ80535VC600512
|sspec2=SL8FN|step2=B1|sock2=Socket 479/FC-µBGA|part2=LE80535VC600512}}
{{cpulist|p6|banias|model=Celeron M ULV 800|ark=27162
|l2=512|fsb=400|mult=8|volt=1.004 V|tdp=7|date=January 2004|price=|links=
|sspec1=SL7DB|step1=B1|sock1=Socket 479/FC-µBGA|part1=RJ80535VC800512}}
{{cpulist|p6|banias|model=Celeron M ULV 333|ark=27156
|l2=512|fsb=400|mult=9|volt=1.004 V|tdp=7|date=January 2004|price=
|sspec1=SL7DH|step1=B1|sock1=Socket 479/FC-µBGA|part1=RJ80535VC900512}}
{{end}}

===== "Dothan-1024" (90 nm) =====
* All models support: ''[[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]]''
* ''XD bit (an [[NX bit]] implementation)'': supported by 360J, 370, 380, 390, 383
{{cpulist|p6|dothan|model=Celeron M 350|ark=27142
|l2=1|fsb=400|mult=13|vmin=1.004|vmax=1.292|tdp=21|date=August 2004|price=|links=1
|sspec1=SL7RA|step1=B0|sock1=Socket 479/FC-µPGA|part1=RH80536NC0131M
|sspec2=SL7R9|step2=B0|sock2=Socket 479/FC-µBGA|part2=RJ80536NC0131M
|sspec3=SL86L|step3=C0|sock3=Socket 479/FC-µPGA|part3=RH80536NC0131M
|sspec4=SL86R|step4=C0|sock=
* Socket 479/FC-µBGA
* Socket 479/FC-µPGA
* Socket 479/FC-µBGA|part4=RJ80536NC0131M
|sspec=
* SL8MK&nbsp;(C1)
* SL8MD&nbsp;(C1)}}
{{cpulist|p6|dothan|model=Celeron M 360|ark=27143
|l2=1|fsb=400|mult=14|vmin=1.004|vmax=1.292|tdp=21|date=August 2004|price=
|sspec1=SL7LS|step1=B0|sock1=Socket 479/FC-µPGA|part1=RH80536NC0171M
|sspec2=SL7LR|step2=B0|sock2=Socket 479/FC-µBGA|part2=RJ80536NC0171M
|sspec3=SL86K|step3=C0|sock3=Socket 479/FC-µPGA|part3=RH80536NC0171M
|sspec4=SL86Q|step4=C0|sock=
* Socket 479/FC-µBGA
* Socket 479/FC-µPGA
* Socket 479/FC-µBGA|part4=RJ80536NC0171M
|sspec=
* SL8ML&nbsp;(C1)
* SL8ME&nbsp;(C1)}}
{{cpulist|p6|dothan|model=Celeron M 370|ark=27145
|l2=1|fsb=400|mult=15|vmin=1.004|vmax=1.292|tdp=21|date=January 2005|price=
|sspec1=SL86J|step1=C0|sock1=Socket 479/FC-µPGA|part1=RH80536NC0211M
|sspec2=SL86P|step2=C0|sock2=Socket 479/FC-µBGA|part2=RJ80536NC0211M
|sspec3=SL8MM|step3=C0|sock3=Socket 479/FC-µPGA|part3=LE80536NC0211M
|sspec4=SL86D|step4=C0|sock=
* Socket 479/FC-µBGA
* Socket 479/FC-µPGA
* Socket 479/FC-µBGA|part4=BX80536NC1500EJ
|sspec=
* SL8K6&nbsp;(C0)
* SL8MT&nbsp;(C0)}}
{{cpulist|p6|dothan|model=Celeron M 380|ark=27146
|l2=1|fsb=400|mult=16|vmin=1.004|vmax=1.292|tdp=21|date=July 2005|price=
|sspec1=SL8MN|step1=C0|sock1=Socket 479/FC-µPGA|part1=RH80536NC0251M
|sspec2=SL8MG|step2=C0|sock2=Socket 479/FC-µBGA|part2=RJ80536NC0251M
|sspec3=SL86H|step3=C0|sock3=Socket 479/FC-µPGA|part3=LE80536NC0251M
|sspec4=SL8MU|step4=C0|sock=* Socket 479/FC-µBGA|part4=BX80536NC1600EJ}}
{{cpulist|p6|dothan|model=Celeron M 390|ark=27147
|l2=1|fsb=400|mult=17|vmin=1.004|vmax=1.292|tdp=21|date=December 2005|price=
|sspec1=SL8MP|step1=C0|sock1=Socket 479/FC-µPGA|part1=RH80536NC0291M
|sspec2=SL8MH|step2=C0|sock2=Socket 479/FC-µBGA|part2=RJ80536NC0291M
|sspec3=SL8MV|step3=C0|sock3=Socket 479/FC-µBGA|part3=LE80536NC0291M}}
{{cpulist|p6|dothan|model=Celeron M ULV 383|ark=27159
|l2=1|fsb=400|mult=10|vmin=0.876|vmax=0.956|tdp=5.5|date=July 2005|price=|links=1
|sspec1=SL8BP|step1=C0|sock1=Socket 479/FC-µBGA|part1=RJ80536VC0011M
|sspec2=SL8LP|step2=C0|sock2=|part2=LE80536VC0011M
|sspec3=SL8BN|step3=C0
|sspec4=SL8LV|step4=C0}}
{{end}}

===== "Dothan-512" (90 nm) =====
* All models support: ''[[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], XD bit (an [[NX bit]] implementation)''
{{cpulist|p6|dothan|model=Celeron 205<ref>{{cite web|url=http://www.cpu-world.com/CPUs/Celeron_M/Intel-Celeron%20M%20205%20RJ80536NC009512%20-%20LE80536NC009512.html |title=Celeron 205 |publisher=Cpu-world.com |date=2016-03-15 |access-date=2016-04-21}}</ref>|ark=
|l2=512|fsb=400|mult=12|volt=1.26 V|tdp=21|date=March 2007|price=|links=1
|sspec1=SL9PX|step1=B1|sock1=Socket 479/FC-µBGA|part1=LE80536NC009512
|sspec2=SL9DB|step2=C0|sock2=|part2=}}
{{cpulist|p6|dothan|model=Celeron M ULV 353|ark=27157
|l2=512|fsb=400|mult=9|vmin=0.876|vmax=0.94|tdp=5|date=July 20, 2004|price=$54|links=1
|sspec1=SL7F7|step1=B0|sock1=Socket 479/FC-µBGA|part1=RJ80536VC900512
|sspec2=SL7QX|step2=B0|sock2=|part2=LE80536VC900512
|sspec=* SLAFK}}
{{cpulist|p6|dothan|model=Celeron M ULV 373|ark=27158
|l2=512|fsb=400|mult=10|vmin=0.876|vmax=0.94|tdp=5.5|date=January 2005|price=$74
|sspec1=SL8A4|step1=C0|sock1=Socket 479/FC-µBGA|part1=RJ80536VC001512
|sspec2=SL89S|step2=C0|sock2=|part2=LE80536VC001512
|sspec=* SL8LW&nbsp;(C0)}}
{{end}}

===== [[Engineering:Yonah (microprocessor)|"Yonah-512"]] (65 nm) =====
* All models support: ''[[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], XD bit (an [[NX bit]] implementation)''
* Steppings: C0
{{cpulist|p6|yonah|model=Celeron 215|ark=32240
|l2=512|fsb=533|mult=10|vmin=1.0|vmax=1.3|tdp=27|date=August 2007|price=$54|links=1
|sspec1=SLA4L|step1=C0|part1=LE80538NE014512}}
{{end}}

===== [[Engineering:Yonah (microprocessor)|"Yonah-1024"]] (65 nm) =====
* All models support: ''[[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], XD bit (an [[NX bit]] implementation)''
* Steppings: C0, D0
{{cpulist|p6|yonah|model=Celeron M 410|ark=27148
|l2=1|fsb=533|mult=11|vmin=1.0|vmax=1.3|tdp=27|date=April 2006|price=$54|links=1
|sspec1=SL8W2|step1=C0|part1=LF80538NE0201M}}
{{cpulist|p6|yonah|model=Celeron M 420|ark=27149
|l2=1|fsb=533|mult=12|vmin=1.0|vmax=1.3|tdp=27|date=April 2006|price=$107
|sspec1=SL8VZ|step1=C0|part1=LF80538NE0251M}}
{{cpulist|p6|yonah|model=Celeron M 430|ark=27150
|l2=1|fsb=533|mult=13|vmin=1.0|vmax=1.3|tdp=27|date=April 2006|price=$134
|sspec1=SL92F|step1=C0|part1=LF80538NE0301M
|sspec2=SL9KV|step2=D0}}
{{cpulist|p6|yonah|model=Celeron M 440|ark=27151
|l2=1|fsb=533|mult=14|vmin=1.0|vmax=1.3|tdp=27|date=October 2006|price=$107
|sspec1=SL9KW|step1=D0|sock1=Socket M|part1=LF80538NE0361ME
|sspec2=SL9LF|step2=D0|sock2=PBGA479|part2=LE80538NE0361ME
  <!--|sspec3=SLH9W-->}}
{{cpulist|p6|yonah|model=Celeron M 450|ark=27152
|l2=1|fsb=533|mult=15|vmin=1.0|vmax=1.3|tdp=27|date=October 2006|price=$134
|sspec1=SL9KX|step1=D0|part1=LF80538NE0411ME}}
{{cpulist|p6|yonah|model=Celeron M ULV 423|ark=27160
|l2=1|fsb=533|mult=8|vmin=0.95|vmax=0.975|tdp=5.5|sock=FCBGA6|date=April 2006|price=$161|links=1
|sspec1=SL8XW|step1=C0|part1=LE80538VE0041M
|sspec2=SL9L7|step2=D0}}
{{cpulist|p6|yonah|model=Celeron M ULV 443|ark=27978
|l2=1|fsb=533|mult=9|vmin=0.95|vmax=0.975|tdp=5.5|sock=FCBGA6|date=September 2006|price=$161
|sspec1=SL9L8|step1=D0|part1=LE80538VE0091ME}}
{{end}}

===== "Sossaman" (65 nm) =====
* All models support: ''[[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], Enhanced Intel SpeedStep Technology ([[Engineering:SpeedStep|EIST]]), XD bit (an [[NX bit]] implementation), Intel VT-x''
* [[Engineering:Die (integrated circuit)|Die]] size: 90.3&nbsp;mm<sup>2</sup>
* Steppings: D0
{{cpulist|p6|sossaman|model=Celeron 1.66|ark=30543
|l2=1|fsb=667|mult=10|vmin=1.1125|vmax=1.25|tdp=27|date=March 2006|price=$84|links=1
|sspec1=SL9S3|step1=D0|part1=LF80538KF0281M}}
{{cpulist|p6|sossaman|model=Celeron 1.83|ark=30544
|l2=1|fsb=667|mult=11|vmin=1.1125|vmax=1.25|tdp=27|date=January 2007
|sspec1=SL9S2|step1=D0|part1=LF80538KF0341M}}
{{end}}

=== Core based Celerons ===

====Celeron M/Celeron ''(single-core)''====

===== [[Engineering:Merom (microprocessor)|"Merom"]], [[Engineering:Merom (microprocessor)#Merom-L|"Merom-L"]] (standard-voltage, 65 nm) {{Anchor|"Merom-1M" (standard-voltage, 65 nm)|"Merom-1024" (standard-voltage, 65 nm)|"Merom-512" (standard-voltage, 65 nm)|"Merom-L" (standard-voltage, 65 nm)|"Merom" (standard-voltage, 65 nm)}} =====
<!-- Merom-1M does not exist, this one is Merom -->
* All models support: ''[[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[SSSE3]], Intel 64, XD bit (an [[NX bit]] implementation)''
* Steppings: B2, E1, G0, G2, A1
{{cpulist|core|head}} <!--                   Please convert below to use {{cpulist|core|merom}}      -->
{{cpulist|core|merom|model=Celeron M 520|ark=27977
|cores=1|l2=1|fsb=533|mult=12|vmin=0.95|vmax=1.3|tdp=30|sock=Socket M|date=January, 2007|price=$134|links=1
|sspec1=SL9WT|step1=B2|part1=LF80537NE0251M
|sspec2=SL9WN|step2=A1
}}
{{cpulist|core|merom|model=Celeron M 530|ark=29733
|cores=1|l2=1|fsb=533|mult=13|vmin=0.95|vmax=1.3|tdp=30|date=March 2007|price=$134
|sspec1=SL9UY |step1=B2 |sock1=Socket M | part1=LF80537NE0301M
|sspec2=SLGFL |step2=G2 |sock2=Socket M | part2=LF80537NE0301M
|sspec3=SL9VA |step3=A1 |sock3=Socket M  | part3=LF80537NE0301M
|sspec4=SLA2G |step4=A1 |sock4=Socket M | part4=LF80537NE0301M
|sspec5=SLA6Y |step5=B2 |sock5=FCBGA6 | part5=LE80537NE0301M
|sspec6=SLGFY |step6=G2 |sock6=FCBGA6 | part6=LE80537NE0301M
}}
{{cpulist|core|merom|model=Celeron 530|ark=33100
|cores=1|l2=1|fsb=533|mult=13|vmin=0.95|vmax=1.3|tdp=27|sock=Socket P|date=March 2007|price=$70
|sspec1=SLA48|step1=E1|part1=LF80537NE0301M
|sspec2=SLA2G|step2=A1|part2=LF80537NE0301MN
}}
{{cpulist|core|merom|model=Celeron 540|ark=30774
|cores=1|l2=1|fsb=533|mult=14|vmin=0.95|vmax=1.3|tdp=30|sock=Socket P|date=July 2007|price=$134
|sspec1=SLA47|step1=E1|part1=LF80537NE0361M
|sspec2=SLA2F|step2=A1
}}
{{cpulist|core|merom|model=Celeron 550|ark=31727
|cores=1|l2=1|fsb=533|mult=15|vmin=0.95|vmax=1.3|tdp=30|date=5 September 2007|price=$134
|sspec1=SLAJ9|step1=G0|sock1=Socket P|part1=LF80537NE0411M
|sspec2=SLA2E|step2=A1|sock2=Socket P|part2=LE80537NE0411M
|sspec3=SLALD|step3=G0|sock3=FCBGA6|part3=LE80537NE0411M
}}
{{cpulist|core|merom|model=Celeron 560|ark=34439
|cores=1|l2=1|fsb=533|mult=16|vmin=0.95|vmax=1.3|tdp=27|sock=Socket P|date=December 2007|price=$134
|sspec1=SLA2D|step1=A1|part1=LF80537NE0461M}}
{{cpulist|core|merom|model=Celeron 570|ark=36676
|cores=1|l2=1|fsb=533|mult=17|vmin=0.95|vmax=1.3|tdp=27|sock=Socket P|date=May 2008|price=$134
|sspec1=SLA2C|step1=A1|part1=LF80537NE0511M}}
{{end}}

===== [[Engineering:Merom (microprocessor)#Merom-2M|"Merom-2M"]] (standard-voltage, 65 nm) =====
* All models support: ''[[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[SSSE3]], Intel 64, XD bit (an [[NX bit]] implementation)''
* Steppings: M0
{{cpulist|core|merom|model=Celeron 575|ark=36680
|cores=1|l2=1|fsb=667|mult=12|vmin=1.075|vmax=1.175|tdp=31|sock=Socket P|date=September 2008|price=$86|links=1
|sspec1=SLB6M|step1=M0|part1=LF80537NF0411M}}
{{cpulist|core|merom|model=Celeron 585|ark=36681
|cores=1|l2=1|fsb=667|mult=13|vmin=1.075|vmax=1.175|tdp=31|sock=Socket P|date=September 2008|price=$107
|sspec1=SLB6L|step1=M0|part1=LF80537NF0481M}}
{{end}}

===== [[Engineering:Merom (microprocessor)#Merom-L|"Merom-L"]] (ultra-low-voltage, 65 nm) =====
* All models support: ''[[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[SSSE3]], Intel 64, XD bit (an [[NX bit]] implementation)''
* Steppings: A1, M1
{{cpulist|core|merom|model=Celeron M ULV 523|ark=32241
|cores=1|l2=1|fsb=533|mult=7|vmin=0.85|vmax=1.1|tdp=5.5|sock=FCBGA6|date=September 2007|price=$161|links=1
|sspec1=SLAHP|step1=A1|part1=LE80537VE9331M}}
{{cpulist|core|merom|model=Celeron ULV 573|ark=41368
|cores=1|l2=512|fsb=533|mult=7.5|vmin=0.8|vmax=0.975|tdp=10|sock=FCBGA6 |date=June 2009|price=
|sspec1=SLGMV|step1=M1|part1=LE80537VE001512}}
{{end}}

====Celeron ''(single-core)''====

===== [[Engineering:Penryn (microprocessor)#Penryn-3M|"Penryn-3M"]] (45 nm)  {{anchor|"Penryn-3M" (standard-voltage, 45 nm)|"Penryn-3M" (ultra-low-voltage, 45 nm}} =====
* All models support: ''[[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[SSSE3]], Intel 64, XD bit (an [[NX bit]] implementation)''
* Package size: 35&nbsp;mm<sup>2</sup> (standard voltage), 22&nbsp;mm<sup>2</sup> (low voltage)
* Steppings: R0
* [[Engineering:Die (integrated circuit)|Die]] size: 107&nbsp;mm<sup>2</sup>
{{cpulist|core|penryn|model=Celeron 900|ark=41498
|sspec1=SLGLQ|step1=R0|cores=1|l2=1|fsb=800|mult=11|vmin=1|vmax=1.25|tdp=35|sok=|date=March 2009|part1=AW80585NG0491MA|price=$70|links=1}}
{{cpulist|core|penryn|model=Celeron 925<ref>{{cite web|url=http://www.cpu-world.com/CPUs/Celeron/Intel-Mobile%20Celeron%20925%20-%20AW80585NG0521MA.html |title=Mobile Celeron 925 |publisher=Cpu-world.com |access-date=2016-04-21}}</ref>|ark=53692
|sspec1=SLGLN|step1=R0|cores=1|l2=1|fsb=800|mult=11.5|vmin=1|vmax=1.25|tdp=35|sok=|date=January 2011|part1=AW80585NG0521MA|price=$70}}
{{cpulist|core|penrynulv|model=Celeron M ULV 722|ark=36749
|sspec1=SLGAT|step1=M0|sspec2=SLGAN|step2=R0|cores=1|l2=1|fsb=800|mult=6|vmin=0.775|vmax=1.1|tdp=5.5|date=September 2008|part1=AV80585VG0091MP|links=1}}
{{cpulist|core|penrynulv|model=Celeron M ULV 723|ark=36685
|sspec1=SLGAS|step1=M0|sspec2=SLGAM|step2=R0|cores=1|l2=1|fsb=800|mult=6|vmin=1.05|vmax=1.15|tdp=10|date=September 2008|part1=AV80585VG0091M|price=$107}}
{{cpulist|core|penrynulv|model=Celeron M ULV 743|ark=37135
|sspec1=SLGEV|step1=R0|cores=1|l2=1|fsb=800|mult=6.5|vmin=1.05|vmax=1.15|tdp=10|date=September 2009|part1=AV80585VG0131M|price=$107}}
{{cpulist|core|penrynulv|model=Celeron ULV 763|ark=53691
|sspec1=SLGQQ|step1=R0|cores=1|l2=1|fsb=800|mult=7|vmin=1.05|vmax=1.15|tdp=10|date=January 2011|part1=AV80585VG0171M|price=$107}}
{{end}}
* Note that 900 has also been used for three earlier models of Intel Celeron microprocessors with different microarchitectures.
* Intel initially listed the Celeron 900 as Dual-Core and with Virtualization Technology in its Processorfinder and ARK databases, which caused confusion among customers.
* ULV 723 possibly supports EIST, but Intel's web site is inconsistent about this.

====Celeron ''(dual-core)''====

===== [[Engineering:Merom (microprocessor)#Merom-2M|"Merom-2M"]] (65 nm) =====
<!-- Merom-512 and Merom-1024 do not exist, please do not change the title back -->
{{Anchor|"Merom-2M" (standard-voltage, 65 nm)|"Merom-512" (standard-voltage, 65 nm)|"Merom-1024" (standard-voltage, 65 nm)|Celeron T1000}}
* All models support: ''[[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[SSSE3]], Intel 64, XD bit (an [[NX bit]] implementation)''
* Steppings: M0
{{cpulist|core|merom|model=Celeron T1400<ref>{{cite web|url=http://www.cpu-world.com/sspec/SL/SLAQL.html |title=Celeron T1400 |publisher=Cpu-world.com |access-date=2016-04-21}}</ref>|ark=
|l2=512|fsb=533|mult=13|vmin=1.075|vmax=1.175|sock=Socket P|date=July 2008|links=1
|sspec1=SLAQL|step1=M0|part1=LF80537NE030512}}
{{cpulist|core|merom|model=Celeron T1500<ref>{{cite web|url=http://www.cpu-world.com/sspec/SL/SLAQK.html |title=Celeron T1500 |publisher=Cpu-world.com |access-date=2016-04-21}}</ref>|ark=
|l2=512|fsb=533|mult=14|vmin=1.075|vmax=1.175|sock=Socket P|date=July 2008|price=$59
|sspec1=SLAQK|step1=M0|part1=LF80537NE036512}}
{{cpulist|core|merom|model=Celeron T1600|ark=38979
|l2=1|fsb=667|mult=10|vmin=1.075|vmax=1.175|sock=Socket P|date=December 2008|price=$80
|sspec1=SLB6J|step1=M0|part1=LF80537NF0281MN}}
{{cpulist|core|merom|model=Celeron T1700|ark=37119
|l2=1|fsb=667|mult=11|vmin=1.075|vmax=1.175|sock=Socket P|date=December 2008|price=$86
|sspec1=SLB6H|step1=M0|part1=LF80537NF0341MN}}
{{end}}
* Note that Intel has also released Core Solo microprocessors with the model numbers T1400, T1500, and T1600.
* T1700 possibly supports EIST, but Intel's web site is inconsistent about this.

===== [[Engineering:Penryn (microprocessor)#Penryn-3M|"Penryn-3M"]] (45 nm)  {{anchor|"Penryn-3M" (standard-voltage, 45 nm)|"Penryn-3M" (ultra-low-voltage, 45 nm)|Celeron T3000|Celeron SU2000}} =====
* Based on Core microarchitecture
* All models support: ''[[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[SSSE3]], Intel 64, XD bit (an [[NX bit]] implementation)''
* Steppings: R0
{{cpulist|core|penryn|model=Celeron T3000<ref>{{cite web|url=http://www.cpu-world.com/CPUs/Celeron_Dual-Core/Intel-Mobile%20Celeron%20Dual-Core%20T3000%20AW80577GG0331ML.html |title=Celeron Dual-Core T3000 |publisher=Cpu-world.com |access-date=2016-04-21}}</ref>|ark=
|l2=1|fsb=800|mult=9|vmin=1|vmax=1.25|date=June 2009|price=$80|links=1
|sspec1=SLGMY|step1=R0|part1=AW80577GG0331ML}}
{{cpulist|core|penryn|model=Celeron T3100|ark=37258
|l2=1|fsb=800|mult=9.5|vmin=1|vmax=1.25|date=June 2009|sock=Socket P<br>BGA479|price=$80<br>$86
|sspec1=SLGEY|step1=R0|part1=AW80577GG0371ML
|sspec2=SLGVS|step2=R0|part2=AV80577NG0371M}}
{{cpulist|core|penryn|model=Celeron T3300|ark=47511
|l2=1|fsb=800|mult=10|vmin=1|vmax=1.25|date=January 2010|sock=Socket P<br>BGA479|price=$86
|sspec1=SLGJW|step1=R0|part1=AW80577GG0411ML
|sspec2=SLG92|step2=R0|part2=AW80577NG0411M}}
{{cpulist|core|penryn|model=Celeron T3500|ark=42104
|l2=1|fsb=800|mult=10.5|vmin=1|vmax=1.25|date=September 2010|sock=Socket P<br>BGA479|price=$80
|sspec1=SLGJV|step1=R0|part1=AW80577GG0451ML
|sspec2=|step2=R0|part2=}}
{{cpulist|core|penrynulv|model=Celeron SU2300|ark=42779
|l2=1|fsb=800|mult=6|vmin=1.05|vmax=1.15|date=September 2009|price=$134|links=1
|sspec1=SLGSB|step1=R0|part1=AV80577UG0091M
|sspec2=SLGYW|step2=R0|part2=AV80577UG0091ML}}
<!--
{{cpulist|core|penrynulv|model=Celeron SU2500
 |l2=1|fsb=800|mult=6.5|date=September 2009
 |sspec1=SLGSA|step1=R0|part1=AV80577UG0131M}}
{{cpulist|core|penrynulv|model=Celeron SU2600
 |l2=1|fsb=800|mult=7|date=September 2009
 |sspec1=SLGS9|step1=R0|part1=AV80577UG0171M}}
-->
{{end}}
* Note that the Pentium T3x00 processors have a similar number but are based on the older Merom-2M chips.
* Note that the [[Engineering:List of Intel Pentium microprocessors#"Penryn-L" (ultra-low voltage, 45 nm)|Pentium SU2xxx]] processors have a similar number but are single-core processors.

=== Westmere based Celerons ===

====Celeron ''(dual-core)''====

===== "Arrandale" (MCP, 32 nm)  {{anchor|"Arrandale" (standard-voltage, 32 nm)|"Arrandale" (ultra-low voltage; 32 nm)}} =====
* Based on [[Engineering:Westmere (microarchitecture)|Westmere microarchitecture]]
* All models support: ''[[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[SSSE3]], Enhanced Intel [[Engineering:SpeedStep|SpeedStep]] Technology (EIST), Intel 64, XD bit (an [[NX bit]] implementation), Intel VT-x, [[Smart Cache]]''
* P4505 and U3405 support memory ECC RAM and PCIe bifurcation.
* FSB has been replaced with DMI.
* Contains 45&nbsp;nm "Ironlake" [[Graphics processing unit|GPU]].
* [[Engineering:Die (integrated circuit)|Die]] size: 81&nbsp;mm<sup>2</sup>
* Graphics and Integrated Memory Controller die size: 114&nbsp;mm<sup>2</sup>
* Steppings: C2, K0
{{cpulist|nehgfx|arrandale|ark=47552|model=Celeron P4500
|mult=14|memspeed=1066|turbo={{n/a}}|gfxclock=500–667|l3=2|vmin=0.775|vmax=1.4|date=March 2010|price=$86|links=1
|sspec1=SLBNL|sspec2=SLBUX|step1=C2|step2=K0|sock1=Socket&nbsp;G1|part1=CP80617004803AA}}
{{cpulist|nehgfx|arrandale|ark=48141|model=Celeron P4505
|mult=14|memspeed=1066|turbo={{n/a}}|gfxclock=500–667|l3=2|vmin=0.775|vmax=1.4|date=March 2010|price=OEM
|sspec1=SLBQB|sspec2=SLBXG|step1=C2|step2=K0|sock1=BGA-1288|part1=CN80617004545AF}}
{{cpulist|nehgfx|arrandale|ark=52301|model=Celeron P4600
|mult=15|memspeed=1066|turbo={{n/a}}|gfxclock=500–667|l3=2|vmin=0.775|vmax=1.4|date=September 2010|price=$86
|sspec1=SLBZY|step1=K0|sock1=Socket G1|part1=CP80617005307AB}}
{{cpulist|nehgfx|arrandale|ark=49157|model=Celeron U3400
|mult=8|memspeed=800|tdp=18|turbo={{n/a}}|gfxclock=166–500|l3=2|vmin=0.725|vmax=1.4|date=May 2010|price=$134|links=1
|sspec1=SLBUE|step1=K0|sock=1288|part1=CN80617006039AA}}
{{cpulist|nehgfx|arrandale|ark=50155|model=Celeron U3405
|mult=8|memspeed=1066|turbo={{n/a}}|gfxclock=166-500|l3=2|tdp=18|vmin=0.725|vmax=1.4|date=August 2010|price=OEM
|sspec1=SLBWX|step1=K0|sock=BGA-1288|part1=CN80617006201AA}}
{{cpulist|nehgfx|arrandale|ark=50030|model=Celeron U3600
|mult=9|memspeed=800|tdp=18|turbo={{n/a}}|gfxclock=166–500|l3=2|vmin=0.725|vmax=1.4|date=January 2011|price=$134
|sspec1=SLBSP|step1=K0|sock=1288|part1=CN80617005199AB}}
{{end}}

=== Sandy Bridge based Celerons ===

==== "Sandy Bridge" (32 nm) ====
* All models support: ''[[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[SSSE3]], SSE4.1, SSE4.2, Enhanced Intel [[Engineering:SpeedStep|SpeedStep]] Technology (EIST), Intel 64, XD bit (an [[NX bit]] implementation), Intel VT-x, Smart Cache.''
* (Embedded) Celeron B810E, Celeron B847E does not support ''XD bit(Execute Disable Bit), nor SSE4.1 and SSE4.2 instructions.''
* (Embedded) Celeron B810E, Celeron B847E has support for ECC memory.
* HD Graphics (Sandy Bridge) contain 6 [[Execution unit|EUs]] as well as HD Graphics 2000, but does not support the following technologies: [[Software:Intel Quick Sync Video|Intel Quick Sync Video]], InTru 3D, Clear Video HD, Wireless Display, and it doesn't support 3D Video.{{citation needed|date=September 2011}}
* Transistors: 624 or 504 million
* [[Engineering:Die (integrated circuit)|Die]] size: 149 or 131&nbsp;mm<sup>2</sup>
{{cpulist|bridge|sandybridge|model=Celeron B710|ark=59569
|cores=1|l3=1.5|mult=16|turbo={{n/a}}|gfxmodel=6eu|gfxclock=650–1000|tdp=35|date=June 2011|price=$70|links=1
|sspec1=SR0DS|sspec2=SR0EB|step1=J1|step2=Q0|sock1=Socket&nbsp;G2|part1=FF8062701078501|part2=FF8062701084201}}
{{cpulist|bridge|sandybridge|model=Celeron B720|ark=63920
|cores=1|l3=1.5|mult=17|turbo={{n/a}}|gfxmodel=6eu|gfxclock=650–1000|tdp=35|date=January 2012|price=$70
|sspec1=SR0DT|sspec2=SR0EA|step1=J1|step2=Q0|sock1=Socket G2|part1=FF8062701078601|part2=FF8062701084101}}
{{cpulist|bridge|sandybridge|model=Celeron B730|ark=
 |cores=1|l3=1.5|mult=18|turbo={{n/a}}|gfxmodel=6eu|gfxclock=650–1000|tdp=35|date=July 2012|price=$70
 |sspec1=SR0QA|step1=Q0|sock1=Socket G2|part1=FF8062701084002|part2=FF8062701148002}}
{{cpulist|bridge|sandybridge|model=Celeron B800|ark=59570
|cores=2|l3=2|mult=15|turbo={{n/a}}|gfxmodel=6eu|gfxclock=650–1000|tdp=35|date=June 2011|price=$80
|sspec1=SR0EW |step1=Q0|sock1=Socket G2|part1=FF8062701142600}}
{{cpulist|bridge|sandybridge|model=Celeron B810|ark=55657
|cores=2|l3=2|mult=16|turbo={{n/a}}|gfxmodel=6eu|gfxclock=650–950|tdp=35|date=March 2011|price=$86
|sspec1=SR088|step1=Q0|sock1=Socket G2|part1=FF8062700848800}}
{{cpulist|bridge|sandybridge|model=Celeron B815|ark=63919
|cores=2|l3=2|mult=16|turbo={{n/a}}|gfxmodel=6eu|gfxclock=650–1050|tdp=35|date=January 2012|price=$86
|sspec1=SR0HZ|step1=Q0|sock1=Socket G2|part1=FF8062701159901}}
{{cpulist|bridge|sandybridge|model=Celeron B820|ark=67193
 |cores=2|l3=2|mult=17|turbo={{n/a}}|gfxmodel=6eu|gfxclock=650–1050|tdp=35|date=July 2012|price=$86
 |sspec1=SR0HQ|step1=Q0|sock1=Socket G2|part1=FF8062700848602}}
{{cpulist|bridge|sandybridge|model=Celeron B830|ark=71141
 |cores=2|l3=2|mult=18|turbo={{n/a}}|gfxmodel=6eu|gfxclock=650–1050|tdp=35|date=September 2012|price=$86
 |sspec1=SR0HR|step1=Q0|sock1=Socket G2|part1=FF8062700848702}}
{{cpulist|bridge|sandybridge|model=Celeron B840|ark=59801
|cores=2|l3=2|mult=19|turbo={{n/a}}||gfxmodel=6eu|gfxclock=650–1000|tdp=35|date=July 2011|price=$86
|sspec1=SR0EN|step1=Q0|sock1=Socket G2|part1=FF8062700998301}}
{{cpulist|bridge|sandybridge|model=Celeron B810E|ark=55762
|cores=2|l3=2|mult=16|turbo={{n/a}}|gfxmodel=6eu|gfxclock=650–1000|tdp=35|date=June 2011|price=OEM
|sspec1=SR0BT|step1=Q0|sock1=BGA-1023|part1=AV8062700849802}}
{{cpulist|bridge|sandybridge|model=Celeron 787|ark=59571
|cores=1|l3=1.5|mult=13|turbo={{n/a}}|gfxmodel=6eu|gfxclock=350–950|tdp=17|date=July 2011|price=$107
|sspec1=SR0EC|sspec2=SR0VJ|step1=J1|step2=Q0|sock1=BGA-1023|part1=AV8062701079501|part2=AV8062701345400}}
{{cpulist|bridge|sandybridge|model=Celeron 797|ark=63917
|cores=1|l3=1.5|mult=14|turbo={{n/a}}|gfxmodel=6eu|gfxclock=350–950|tdp=17|date=January 2012|price=$107
|sspec1=SR0ED|sspec2=SR0VK|step1=J1|step2=Q0|sock1=BGA-1023|part1=AV8062701079601|part2=AV8062701345500}}
{{cpulist|bridge|sandybridge|model=Celeron 807|ark=67818
|cores=1|l3=1.5|mult=15|turbo={{n/a}}|gfxmodel=6eu|gfxclock=350–950|tdp=17|date=July 2012|price=$70
|sspec1=SR0EE|sspec2=SR0PW|sspec3=SR0VL|step1=J1|step2=J1|step3=Q0|sock1=BGA-1023|part1=AV8062701079701|part2=AV8062701079702|part3=AV8062701345600}}
{{cpulist|bridge|sandybridge|model=Celeron 847|ark=56056
|cores=2|l3=2|mult=11|turbo={{n/a}}|gfxmodel=6eu|gfxclock=350–800|tdp=17|date=June 2011|price=$134
|sspec1=SR08N|step1=Q0|sock1=BGA-1023|part1=AV8062700852800}}
{{cpulist|bridge|sandybridge|model=Celeron 857|ark=59572
|cores=2|l3=2|mult=12|turbo={{n/a}}|gfxmodel=6eu|gfxclock=350–1000|tdp=17|date=July 2011|price=$134
|sspec1=SR0EZ|sspec2=SR0FL|sspec3=SR0V2|step1=Q0|step2=J1|step3=Q0|sock1=BGA-1023|part1=AV8062701022701|part2=AV8062701149001}}
{{cpulist|bridge|sandybridge|model=Celeron 867|ark=63918
|cores=2|l3=2|mult=13|turbo={{n/a}}|gfxmodel=6eu|gfxclock=350–1000|tdp=17|date=January 2012|price=$134
|sspec1=SR0F0|sspec2=SR0FK|sspec3=SR0V3|step1=J1|step2=J1|step3=Q0|sock1=BGA-1023|part1=AV8062701022801|part2=AV8062701148901|part3=AV8062701022801}}
{{cpulist|bridge|sandybridge|model=Celeron 877|ark=67192
|cores=2|l3=2|mult=14|turbo={{n/a}}|gfxmodel=6eu|gfxclock=350–1000|tdp=17|date=July 2012|price=$86
|sspec1=SR08U|sspec2=SR0F8|sspec3=SR0FD|sspec4=SR0VB|step1=Q0|step2=Q0|step3=J1|step4=Q0|sock1=BGA-1023|part1=AV8062701085500|part2=AV8062701085501|part3=AV8062701148001|part4=AV8062701085501}}
{{cpulist|bridge|sandybridge|model=Celeron 887|ark=69361
|cores=2|l3=2|mult=15|turbo={{n/a}}|gfxmodel=6eu|gfxclock=350–1000|tdp=17|date=September 2012|price=$86
|sspec1=SR090|sspec2=SR0F7|sspec3=SR0FE|sspec4=SR0VA|step1=Q0|step2=Q0|step3=J1|step4=Q0|sock1=BGA-1023|part1=AV8062701085400|part2=AV8062701085401|part3=AV8062701148101|part4=AV8062701085401}}
{{cpulist|bridge|sandybridge|model=Celeron 827E|ark=55770
|cores=1|l3=1.5|mult=14|turbo={{n/a}}|gfxmodel=6eu|gfxclock=350–800|tdp=17|date=July 2011|price=OEM
|sspec1=SR0C6|step1=Q0|sock1=BGA-1023|part1=AV8062701082300}}
{{cpulist|bridge|sandybridge|model=Celeron 847E|ark=55764
|cores=2|l3=2|mult=11|turbo={{n/a}}|gfxmodel=6eu|gfxclock=350–800|tdp=17|date=June 2011|price=OEM
|sspec1=SR0BU|step1=Q0|sock1=BGA-1023|part1=AV8062700849902}}
{{cpulist|bridge|sandybridge|model=Celeron 807UE|ark=63572
|cores=1|l3=1|mult=10|turbo={{n/a}}|gfxmodel=6eu|gfxclock=350–800|tdp=10|date=December 2011|price=OEM
|sspec1=SR0NB|step1=Q0|sock1=BGA-1023|part1=AV8062701188200}}
{{end}}

==== "Ivy Bridge" (22 nm) ====
* All models support: ''[[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[SSSE3]], SSE4.1, SSE4.2, Enhanced Intel [[Engineering:SpeedStep|SpeedStep]] Technology (EIST), Intel 64, XD bit (an [[NX bit]] implementation), Intel VT-x, Smart Cache.''
* [[Engineering:Intel HD Graphics|HD Graphics]] (Ivy Bridge) contain 6 [[Execution unit|EUs]] as well as HD Graphics 2500, but does not support the following technologies: Intel Quick Sync Video, InTru 3D, Clear Video HD, Wireless Display, Intel Insider.
* Embedded models have support for ECC memory.
{{cpulist|bridge|ivybridge|model=Celeron 1000M|ark=72060
|cores=2|l3=2|mult=18|turbo={{n/a}}|gfxmodel=6eu|gfxclock=650–1000|tdp=35|date=January 2013|price=$86|links=1
|sspec1=SR102|step1=P0|sock1=Socket G2|part1=AW8063801120200|part2=|part3=}}
{{cpulist|bridge|ivybridge|model=Celeron 1005M|ark=75193
|cores=2|l3=2|mult=19|turbo={{n/a}}|gfxmodel=6eu|gfxclock=650–1000|tdp=35|date=June 2013|price=$86
|sspec1=SR103|step1=P0|sock1=Socket G2|part1=AW8063801121200|part2=|part3=}}
{{cpulist|bridge|ivybridge|model=Celeron 1020M|ark=71994
|cores=2|l3=2|mult=21|turbo={{n/a}}|gfxmodel=6eu|gfxclock=650–1000|tdp=35|date=January 2013|price=$86
|sspec1=SR0ZY|sspec2=SR13U|step1=E1|step2=P0|sock1=Socket G2|part1=AW8063801443700|part2=AW8063801524200|part3=}}
{{cpulist|bridge|ivybridge|model=Celeron 1020E|ark=74344
|cores=2|l3=2|mult=22|turbo={{n/a}}|gfxmodel=6eu|gfxclock=650–1000|tdp=35|date=January 2013|price=$86
|sspec1=SR10D|step1=P0|sock1=Socket G2|part1=AW8063801117700
|sspec2=SR0VR|step2=P0|sock2=BGA-1023|part2=AV8063801276200}}
{{cpulist|bridge|ivybridge|model=Celeron 1007U|ark=72061
|cores=2|l3=2|mult=15|turbo={{n/a}}|gfxmodel=6eu|gfxclock=350–1000|tdp=17|date=January 2013|price=$86
|sspec1=SR109|step1=P0|sock1=BGA-1023|part1=AV8063801118700|part2=|part3=}}
{{cpulist|bridge|ivybridge|model=Celeron 1017U|ark=75192
|cores=2|l3=2|mult=16|turbo={{n/a}}|gfxmodel=6eu|gfxclock=350–1000|tdp=17|date=June 2013|price=$86
|sspec1=SR10A|step1=P0|sock1=BGA-1023|part1=AV8063801130300|part2=|part3=}}
{{cpulist|bridge|ivybridge|model=Celeron 1037U|ark=71995
|cores=2|l3=2|mult=18|turbo={{n/a}}|gfxmodel=6eu|gfxclock=350–1000|tdp=17|date=January 2013|price=$86
|sspec1=SR108|step1=P0|sock1=BGA-1023|part1=AV8063801442900|part2=|part3=}}
{{cpulist|bridge|ivybridge|model=Celeron 927UE|ark=74346
|cores=1|l3=1|mult=15|turbo={{n/a}}|gfxmodel=6eu|gfxclock=350–900|tdp=17|date=January 2013|price=$107
|sspec1=SR10F|step1=P0|sock1=BGA-1023|part1=AV8063801129600}}
{{cpulist|bridge|ivybridge|model=Celeron 1047UE|ark=74345
|cores=2|l3=2|mult=14|turbo={{n/a}}|gfxmodel=6eu|gfxclock=350–900|tdp=17|date=January 2013|price=$134
|sspec1=SR10E|step1=P0|sock1=BGA-1023|part1=AV8063801116300}}
{{cpulist|bridge|ivybridge|model=Celeron 1019Y|ark=75102
|cores=2|l3=2|mult=10|turbo={{n/a}}|gfxmodel=6eu|gfxclock=350–800|tdp=10|date=April 2013|price=$153
|sspec1=SR13W|step1=P0|sock1=BGA-1023|part1=AV8063801443502|part2=|part3=}}
{{end}}

=== Haswell based Celerons ===

==== "[[Haswell (microarchitecture)|Haswell-MB]]" (22 nm) ====
* All models support: ''[[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[SSSE3]], SSE4.1, SSE4.2, Enhanced Intel [[Engineering:SpeedStep|SpeedStep]] Technology (EIST), Intel 64, XD bit (an [[NX bit]] implementation), Intel VT-x, Smart Cache.''
* 2970M supports Intel Quick Sync Video.
{{cpulist|haswell|haswell|model=Celeron 2950M|ark=77403
|cores=2|l3=2|mult=20|turbo={{n/a}}|gfxmodel=10eu|gfxclock=400–1100|tdp=37|date=September 2013|price=$86|links=1
|sspec1=SR1HF|step1=C0|sock=946B|part1=CW8064701487007}}
{{cpulist|haswell|haswell|model=Celeron 2970M|ark=81014
|cores=2|l3=2|mult=22|turbo={{n/a}}|gfxmodel=10eu|gfxclock=400–1100|tdp=37|date=April 2014|price=$75
|sspec1=SR1LF|step1=C0|sock=946B|part1=CW8064701487001}}
{{end}}

==== "Haswell-ULT" ([[Engineering:System in package|SiP]], 22 nm) ====

* All models support: ''[[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[SSSE3]], SSE4.1, SSE4.2, Enhanced Intel [[Engineering:SpeedStep|SpeedStep]] Technology (EIST), Intel 64, XD bit (an [[NX bit]] implementation), Intel VT-x, Smart Cache.''
* 2957U and 2981U also support ''[[Engineering:WiDi|Intel Wireless Display]]'' and Intel Quick Sync Video.
* Transistors: 1.3 billion
* [[Engineering:Die (integrated circuit)|Die]] size: 181&nbsp;mm<sup>2</sup>
{{cpulist|haswell|haswell|model=Celeron 2955U|ark=75608
|cores=2|l3=2|mult=14|turbo={{n/a}}|gfxmodel=10eu|gfxclock=200–1000|tdp=15|date=September 2013|price=$132|links=1
|sspec1=SR16Y|sspec2=SR1DU|step1=C0|step2=D0|sock1=BGA-1168|part1=CL8064701523900|part2=CL8064701567500}}
{{cpulist|haswell|haswell|model=Celeron 2957U|ark=78942
|cores=2|l3=2|mult=14|turbo={{n/a}}|gfxmodel=10eu|gfxclock=200–1000|tdp=15|date=December 2013|price=$132
|sspec1=SR1DV|step1=D0|sock1=BGA-1168|part1=CL8064701570000}}
{{cpulist|haswell|haswell|model=Celeron 2980U|ark=76620
|cores=2|l3=2|mult=16|turbo={{n/a}}|gfxmodel=10eu|gfxclock=200–1000|tdp=15|date=September 2013|price=$137
|sspec1=SR1DM|step1=D0|sock1=BGA-1168|part1=CL8064701479801}}
{{cpulist|haswell|haswell|model=Celeron 2981U|ark=78944
|cores=2|l3=2|mult=16|turbo={{n/a}}|gfxmodel=10eu|gfxclock=200–1000|tdp=15|date=December 2013|price=$132
|sspec1=SR1DX|step1=D0|sock1=BGA-1168|part1=CL8064701570200}}
{{end}}

==== "Haswell-ULX" ([[Engineering:System in package|SiP]], 22 nm) ====

* All models support: ''[[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[SSSE3]], SSE4.1, SSE4.2, Enhanced Intel [[Engineering:SpeedStep|SpeedStep]] Technology (EIST), Intel 64, XD bit (an [[NX bit]] implementation), Intel VT-x, Smart Cache.
* Transistors: 1.3 billion
* [[Engineering:Die (integrated circuit)|Die]] size: 181&nbsp;mm<sup>2</sup>
* GPU supports Intel Quick Sync Video.
{{cpulist|haswell|haswell|model=Celeron 2961Y|ark=78943
|cores=2|l3=2|mult=11|turbo={{n/a}}|gfxmodel=10eu|gfxclock=200–850|tdp=11.5|date=December 2013|price=|links=1
|sspec1=SR1DK|step1=D0|sock1=BGA-1168|part1=CL8064701568400}}
{{end}}

==== "Haswell-H" (22 nm) ====

* All models support: ''[[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[SSSE3]], SSE4.1, SSE4.2, Enhanced Intel [[Engineering:SpeedStep|SpeedStep]] Technology (EIST), Intel 64, XD bit (an [[NX bit]] implementation), Intel VT-x, Smart Cache.''
* Transistors: 1.3 billion
* [[Engineering:Die (integrated circuit)|Die]] size: 181&nbsp;mm<sup>2</sup>
* Embedded models support ECC memory
* GPU doesn't support Intel Quick Sync Video.
{{cpulist|haswell|haswell|model=Celeron 2000E|ark=76295
|cores=2|l3=2|mult=22|turbo={{n/a}}|gfxmodel=10eu|gfxclock=400–900|tdp=37|date=January 2014|price=$86
|sspec1=SR17S|step1=C0|sock=1364|part1= CL8064701528700}}
{{cpulist|haswell|haswell|model=Celeron 2002E|ark=76296
|cores=2|l3=2|mult=15|turbo={{n/a}}|gfxmodel=10eu|gfxclock=400–900|tdp=25|date=January 2014|price=$86
|sspec1=SR17P|step1=C0|sock=1364|part1= CL8064701484102}}
{{end}}

==== "[[Broadwell (microarchitecture)|Broadwell-U]]" (14 nm) ====
* All models support: ''[[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[SSSE3]], SSE4.1, SSE4.2, Enhanced Intel [[Engineering:SpeedStep|SpeedStep]] Technology (EIST), Intel 64, XD bit (an [[NX bit]] implementation), Intel VT-x, Intel VT-d, Smart Cache, [[Engineering:WiDi|Intel Wireless Display]]'', and configurable TDP (cTDP) down
{{cpulist|haswell|haswell|model=Celeron 3205U|ark=84809|cores=2|l3=2|mult=15|turbo={{n/a}}|gfxmodel=12eu|gfxclock=100–800|tdp=15|date=January 2015|price=$107|links=1|sspec1=SR215|step1=E0|sock=1168|part1= FH8065801882800}}
{{cpulist|haswell|haswell|model=Celeron 3215U|ark=84810|cores=2|l3=2|mult=17|turbo={{n/a}}|gfxmodel=12eu|gfxclock=300–850|tdp=15|date=June 2015|price=$107|sspec1=SR243|step1=F0|sock=1168|part1= FH8065801882802}}
{{cpulist|haswell|haswell|model=Celeron 3755U|ark=84811|cores=2|l3=2|mult=17|turbo={{n/a}}|gfxmodel=12eu|gfxclock=100–800|tdp=15|date=January 2015|price=$107|sspec1=SR211|step1=E0|sock=1168|part1= FH8065801620801}}
{{cpulist|haswell|haswell|model=Celeron 3765U|ark=84812|cores=2|l3=2|mult=19|turbo={{n/a}}|gfxmodel=12eu|gfxclock=300–850|tdp=15|date=June 2015|price=$107|sspec1=SR242|step1=F0|sock=1168|part1= FH8065801620803}}
{{end}}

=== Silvermont based Celerons ===

===="[[Engineering:Silvermont|Bay Trail-M]]" (22 nm)====
* All models support: ''[[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[SSSE3]], SSE4.1, SSE4.2, Enhanced Intel [[Engineering:SpeedStep|SpeedStep]] Technology (EIST), Intel 64, XD bit (an [[NX bit]] implementation), Intel VT-x''.
* GPU and memory controller are integrated onto the processor die
* GPU is based on Ivy Bridge [[Engineering:Intel HD Graphics|Intel HD Graphics]], with 4 execution units, and supports DirectX 11, OpenGL 4.0, OpenGL ES 3.0 and OpenCL 1.1. N2807, N2808, N2830, N2840, N2930 and N2940 support Intel Quick Sync Video.
* Package size:  25&nbsp;mm × 27&nbsp;mm
{{cpulist|silvermont|baytrail|model=Celeron N2805|ark=76754|cores=2|freq=1.46|burst=1.5|gfxmodel=4eu|mem=1 × DDR3L-1066
|gfxclock=313-667|l2=1|tdp=4.3|sdp=2.5|sock1=FC-BGA 1170|date=September 2013|price=$132|links=1
  |sspec1=SR1LY|sspec2=SR1HS|step1=B2|step2=B2|part1=FH8065301564500}}
{{cpulist|silvermont|baytrail|model=Celeron N2806|ark=79050|cores=2|freq=1.6|burst=2|gfxmodel=4eu|mem=1 × DDR3L-1066
|gfxclock=313-756|l2=1|tdp=4.5|sdp=2.5|sock1=FC-BGA 1170|date=November 2013|price=$132
  |sspec1=SR1SH|step1=B3|part1=FH8065301616703}}
{{cpulist|silvermont|baytrail|model=Celeron N2807|ark=81072|cores=2|freq=1.58|burst=2.16|gfxmodel=4eu|mem=1 × DDR3L-1333
|gfxclock=313-750|l2=1|tdp=4.3|sdp=2.5|sock1=FC-BGA 1170|date=March 2014|price=$107
  |sspec1=SR1W5|step1=C0|part1=FH8065301730502
  |sspec2=SR3V8|step2=D1|part2=FH8065301730502}}
{{cpulist|silvermont|baytrail|model=Celeron N2808|ark=82102|cores=2|freq=1.58|burst=2.25|gfxmodel=4eu|mem=1 × DDR3L-1333
|gfxclock=311-792|l2=1|tdp=4.5|sdp=3|sock1=FC-BGA 1170|date=July 2014|price=$107
  |sspec1=SR1YH|step1=C0|part1=FH8065301903500}}
{{cpulist|silvermont|baytrail|model=Celeron N2810|ark=76753|cores=2|freq=2|gfxmodel=4eu|mem=2 × DDR3L-1066
|gfxclock=313-756|l2=1|tdp=7.5|sdp=4.5|sock1=FC-BGA 1170|date=September 2013|price=$132
  |sspec1=SR1LX|sspec2=SR1HR|step1=B2|step2=B2|part1=FH8065301564501}}
{{cpulist|silvermont|baytrail|model=Celeron N2815|ark=79051|cores=2|freq=1.86|burst=2.13|gfxmodel=4eu|mem=2 × DDR3L-1066
|gfxclock=313-756|l2=1|tdp=7.5|sdp=4.5|sock1=FC-BGA 1170|date=November 2013|price=$132
  |sspec1=SR1SJ|step1=B3|part1=FH8065301619509}}
{{cpulist|silvermont|baytrail|model=Celeron N2820|ark=79052|cores=2|freq=2.13|burst=2.39|gfxmodel=4eu|mem=2 × DDR3L-1066
|gfxclock=313-756|l2=1|tdp=7.5|sdp=4.5|sock1=FC-BGA 1170|date=November 2014|price=$132
  |sspec1=SR1SG|step1=B3|part1=FH8065301616603}}
{{cpulist|silvermont|baytrail|model=Celeron N2830|ark=81071|cores=2|freq=2.16|burst=2.41|gfxmodel=4eu|mem=2 × DDR3L-1333
|gfxclock=313-750|l2=1|tdp=7.5|sdp=4.5|sock1=FC-BGA 1170|date=February 2014|price=$107
  |sspec1=SR1W4|step1=C0|part1=FH8065301729602}}
{{cpulist|silvermont|baytrail|model=Celeron N2840|ark=82103|cores=2|freq=2.16|burst=2.58|gfxmodel=4eu|mem=2 × DDR3L-1333
|gfxclock=313-792|l2=1|tdp=7.5|sdp=4.5|sock1=FC-BGA 1170|date=July 2014|price=$107
  |sspec1=SR1YJ|step1=C0|part1=FH8065301903600}}
{{cpulist|silvermont|baytrail|model=Celeron N2910|ark=76752|cores=4|freq=1.6|gfxmodel=4eu|mem=2 × DDR3L-1066
|gfxclock=313-756|tdp=7.5|sdp=4.5|sock1=FC-BGA 1170|date=September 2013|price=$132
  |sspec1=SR1LW|sspec2=SR1HQ|step1=B2|step2=B2|part1=FH8065301546402}}
{{cpulist|silvermont|baytrail|model=Celeron N2920|ark=79053|cores=4|freq=1.86|burst=2.1|gfxmodel=4eu|mem=2 × DDR3L-1066
|gfxclock=313-844|tdp=7.5|sdp=4.5|sock1=FC-BGA 1170|date=November 2013|price=$132
  |sspec1=SR1SF|step1=B3|part1=FH8065301616203}}
{{cpulist|silvermont|baytrail|model=Celeron N2930|ark=81073|cores=4|freq=1.83|burst=2.16|gfxmodel=4eu|mem=2 × DDR3L-1333
|gfxclock=313-854|tdp=7.5|sdp=4.5|sock1=FC-BGA 1170|date=February 2014|price=$107
  |sspec1=SR1W3|step1=C0|part1=FH8065301729501
  |sspec2=SR3V7|step2=D1|part2=FH8065301729501}}
{{cpulist|silvermont|baytrail|model=Celeron N2940|ark=82104|cores=4|freq=1.83|burst=2.25|gfxmodel=4eu|mem=2 × DDR3L-1333
|gfxclock=313-854|tdp=7.5|sdp=4.5|sock1=FC-BGA 1170|date=July 2014|price=$107
  |sspec1=SR1YV|step1=C0|part1=FH8065301919600}}
{{end}}

=== Airmont based Celerons ===

===="[[Engineering:Silvermont|Braswell]]" (14 nm)====
* All models support: ''[[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[SSSE3]], SSE4.1, SSE4.2, Enhanced Intel [[Engineering:SpeedStep|SpeedStep]] Technology (EIST), Intel 64, XD bit (an [[NX bit]] implementation), Intel VT-x, [[AES instruction set|AES-NI]]''.
* GPU and memory controller are integrated onto the processor die
* GPU is based on [[Broadwell (microarchitecture)|Broadwell]] [[Engineering:Intel HD Graphics|Intel HD Graphics]], with 12 execution units, and supports DirectX 11.2, OpenGL 4.3, OpenGL ES 3.0 and OpenCL 1.2 (on Windows).
* Package size: 25 mm × 27 mm
{{cpulist|silvermont|baytrail|model=Celeron N3000|ark=87259|cores=2|mult=12.5|burst=2.08|gfxmodel=12eu
|gfxclock=320-600|l2=2|mem=2 × DDR3L-1600|vmin=0.4|vmax=1.14|tdp=4|sdp=3|sock1=FC-BGA 1170|date=March 2015|price=$107|links=1
  |sspec1=SR29J|sspec2=|step1=C0|step2=|part1=FH8066501715915}}
{{cpulist|silvermont|baytrail|model=Celeron N3010|ark=91710|cores=2|mult=12.5|burst=2.24|gfxmodel=400
|gfxclock=320-600|l2=2|mem=2 × DDR3L-1600|vmin=0.4|vmax=1.14|tdp=4|sdp=3|sock1=FC-BGA 1170|date=January 2016|price=$107
  |sspec1=SR2KM|step1=D1|part1=FH8066501715938}}
{{cpulist|silvermont|baytrail|model=Celeron N3050|ark=87257|cores=2|mult=19.2|burst=2.16|gfxmodel=12eu
|gfxclock=320-600|l2=2|mem=2 × DDR3L-1600|vmin=0.4|vmax=1.14|tdp=6|sdp=4|sock1=FC-BGA 1170|date=March 2015|price=$107
  |sspec1=SR29H|sspec2=SR2A9|step1=C0|step2=C0|part1=FH8066501715914|part2=FH8066501715925}}
{{cpulist|silvermont|baytrail|model=Celeron N3060|ark=91832|cores=2|mult=19.2|burst=2.48|gfxmodel=400
|gfxclock=320-600|l2=2|mem=2 × DDR3L-1600|vmin=0.4|vmax=1.14|tdp=6|sdp=4|sock1=FC-BGA 1170|date=January 2016|price=$107
  |sspec1=SR2KN|sspec2=SR2ZN|step1=D1|step2=D1|part1=FH8066501715929|part2=FH8066501715949}}
{{cpulist|silvermont|baytrail|model=Celeron N3150|ark=87258|cores=4|mult=19.2|burst=2.08|gfxmodel=12eu
|gfxclock=320-640|l2=2|mem=2 × DDR3L-1600|vmin=0.4|vmax=1.14|tdp=6|sdp=4|sock1=FC-BGA 1170|date=March 2015|price=$107
  |sspec1=SR29F|sspec2=SR2A8|step1=C0|step2=C0|part1=FH8066501715913|part2=FH8066501715924}}
{{cpulist|silvermont|baytrail|model=Celeron N3160|ark=91831|cores=4|mult=19.2|burst=2.24|gfxmodel=400
|gfxclock=320-640|l2=2|mem=2 × DDR3L-1600|vmin=|vmax=|tdp=6|sdp=4|sock1=FC-BGA 1170|date=January 2016|price=$107
  |sspec1=SR2KP|step1=D1|part1=FH8066501715928}}
{{end}}

=== Skylake based Celerons ===

==== "[[Skylake (microarchitecture)|Skylake-U]]" (14 nm) ====
* All models support: ''[[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[SSSE3]], SSE4.1, SSE4.2, Enhanced Intel [[Engineering:SpeedStep|SpeedStep]] Technology (EIST), Intel 64, XD bit (an [[NX bit]] implementation), Intel VT-x, Intel VT-d, [[AES instruction set|AES-NI]], Smart Cache, [[Engineering:WiDi|Intel Wireless Display]]'', and configurable TDP (cTDP) down
{{cpulist|skylake|skylake|model=Celeron 3855U|sock=1356|ark=92211|cores=2|threads=2|l3=2|mult=16|turbo={{n/a}}|gfxmodel=510|gfxclock=300–900|tdp=15|date=December 2015|sspec1=SR2EV|step1=D1|part1=FJ8066201931008|price=$107|links=1}}
{{cpulist|skylake|skylake|model=Celeron 3955U|sock=1356|ark=92213|cores=2|threads=2|l3=2|mult=20|turbo={{n/a}}|gfxmodel=510|gfxclock=300–900|tdp=15|date=December 2015|sspec1=SR2EW|step1=D1|part1=FJ8066201931006|price=$107}}
{{end}}

=== Goldmont based Celerons ===

===="[[Engineering:Goldmont|Apollo Lake]]" (14 nm)====
* All models support: ''[[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[SSSE3]], SSE4.1, SSE4.2, Enhanced Intel [[Engineering:SpeedStep|SpeedStep]] Technology (EIST), Intel 64, XD bit (an [[NX bit]] implementation), Intel VT-x, Intel VT-d, [[AES instruction set|AES-NI]]''.
* GPU and memory controller are integrated onto the processor die
* GPU is based on [[Skylake (microarchitecture)|Skylake]] [[Engineering:Intel HD Graphics|Intel HD Graphics]], with 12 execution units, and supports DirectX 12, OpenGL 4.5, OpenGL ES 3.0 and OpenCL 1.2 (on Windows).
* Package size: 24 mm × 31 mm
{{cpulist|silvermont|baytrail|model=Celeron N3350|ark=95598|cores=2|mult=13.2|burst=2.4|gfxmodel=500
|gfxclock=200-650|l2=2|mem=2 × DDR3L-1866<br />2 × LPDDR4-2400|vmin=|vmax=|tdp=6|sdp=4|sock1=FC-BGA 1296|date=September 2016|price=$107|links=1
  |sspec1=SR2YB|sspec2=SR2Z7|sspec3=SR36M|sspec4=SREKH|step1=B0|step2=B1|step3=B1|step4=F1|part1=FH8066802980002}}
{{cpulist|silvermont|baytrail|model=Celeron N3450|ark=95596|cores=4|mult=13.2|burst=2.2|gfxmodel=500
|gfxclock=200-700|l2=2|mem=2 × DDR3L-1866<br />2 × LPDDR4-2400|vmin=|vmax=|tdp=6|sdp=4|sock1=FC-BGA 1296|date=September 2016|price=$107
  |sspec1=SR2YA|sspec2=SR2Z6|sspec3=SR36L|step1=B0|step2=B1|step3=B1|part1=FH8066802979803}}
{{end}}

=== Goldmont Plus based Celerons ===

===="[[Engineering:Goldmont Plus|Gemini Lake]]" (14 nm)====
* All models support: ''[[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[SSSE3]], SSE4.1, SSE4.2, Enhanced Intel [[Engineering:SpeedStep|SpeedStep]] Technology (EIST), Intel 64, XD bit (an [[NX bit]] implementation), Intel SGX, Intel VT-x, Intel VT-d, [[AES instruction set|AES-NI]]''.
* GPU and memory controller are integrated onto the processor die
* GPU is based on Kaby Lake [[Engineering:Intel HD Graphics|Intel HD Graphics]], with 12 execution units, and supports DirectX 12, OpenGL 4.5, OpenGL ES 3.0 and OpenCL 1.2 (on Windows).
* Package size: 25 mm × 24 mm
{{cpulist|silvermont|baytrail|model=Celeron N4000|ark=128988|cores=2|mult=13.2|burst=2.6|gfxmodel=600
|gfxclock=200-650|l2=4|mem=2 × LPDDR4-2400|vmin=|vmax=|tdp=6|sdp=4.8|sock1=FC-BGA 1090|date=December 2017|price=$107|links=1
  |sspec1=SR3S1|step1=B0|part1=FH8068003067417}}
{{cpulist|silvermont|baytrail|model=Celeron N4100|ark=128983|cores=4|mult=13.2|burst=2.4|gfxmodel=600
|gfxclock=200-700|l2=4|mem=2 × LPDDR4-2400|vmin=|vmax=|tdp=6|sdp=4.8|sock1=FC-BGA 1090|date=December 2017|price=$107
  |sspec1=SR3S0|step1=B0|part1=FH8068003067408}}
{{end}}

===="[[Engineering:Goldmont Plus|Gemini Lake Refresh]]" (14 nm)====
* All models support: ''[[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[SSSE3]], SSE4.1, SSE4.2, Enhanced Intel [[Engineering:SpeedStep|SpeedStep]] Technology (EIST), Intel 64, XD bit (an [[NX bit]] implementation), Intel SGX, Intel VT-x, Intel VT-d, [[AES instruction set|AES-NI]]''.
* GPU and memory controller are integrated onto the processor die
* GPU is based on Kaby Lake [[Engineering:Intel HD Graphics|Intel HD Graphics]], with 12 execution units, and supports DirectX 12, OpenGL 4.5, OpenGL ES 3.0 and OpenCL 1.2 (on Windows).
* Package size: 25 mm × 24 mm
{{cpulist|silvermont|baytrail|model=Celeron N4020|ark=197310|cores=2|mult=13.2|burst=2.8|gfxmodel=600
|gfxclock=200-650|l2=4|mem=2 × LPDDR4-2400|vmin=|vmax=|tdp=6|sdp=4.8|sock1=FC-BGA 1090|date=November 2019|price=$107|links=1
  |sspec1=SRET0|step1=R0|part1=FH8068003067426}}
{{cpulist|silvermont|baytrail|model=Celeron N4120|ark=197309|cores=4|mult=13.2|burst=2.6|gfxmodel=600
|gfxclock=200-700|l2=4|mem=2 × LPDDR4-2400|vmin=|vmax=|tdp=6|sdp=4.8|sock1=FC-BGA 1090|date=November 2019|price=$107
  |sspec1=SRESZ|step1=R0|part1=FH8068003067400}}
{{end}}

=== Kaby Lake based Celerons ===

==== "[[Kaby Lake|Kaby Lake-U]]" (14 nm) ====
* All models support: ''[[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[SSSE3]], SSE4.1, SSE4.2, SGX, [[Intel MPX|MPX]], Enhanced Intel [[Engineering:SpeedStep|SpeedStep]] Technology (EIST), Intel 64, XD bit (an [[NX bit]] implementation), Intel VT-x, Intel VT-d, [[AES instruction set|AES-NI]], Smart Cache'', and configurable TDP (cTDP) down
{{cpulist|skylake|skylake|model=Celeron 3865U|sock=1356|ark=96507|cores=2|threads=2|l3=2|mult=18|turbo={{n/a}}|gfxmodel=610|gfxclock=300–900|tdp=15|date=January 2017|sspec1=SR349|step1=H0|part1=FJ8067702739933|price=$107|links=1}}
{{cpulist|skylake|skylake|model=Celeron 3965U|sock=1356|ark=96506|cores=2|threads=2|l3=2|mult=22|turbo={{n/a}}|gfxmodel=610|gfxclock=300–900|tdp=15|date=January 2017|sspec1=SR34A|step1=H0|part1=FJ8067702739934|price=$107}}
{{end}}

==== "[[Kaby Lake|Kaby Lake-Y]]" (14 nm) ====
* All models support: ''[[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[SSSE3]], SSE4.1, SSE4.2, SGX, [[Intel MPX|MPX]], Enhanced Intel [[Engineering:SpeedStep|SpeedStep]] Technology (EIST), Intel 64, XD bit (an [[NX bit]] implementation), Intel VT-x, Intel VT-d, [[AES instruction set|AES-NI]], Smart Cache'', and configurable TDP (cTDP) down
{{cpulist|skylake|skylake|model=Celeron 3965Y |sock=1515 |ark=122698|cores=2 |threads=2 |l3=2 |mult=15 |turbo={{n/a}} |gfxmodel=615 |gfxclock=300–850 |tdp=6 |date=June 2017 |sspec1=SR3GG |step1=H0 |part1=HE8067702740021 |price=$107}}
{{end}}

==== "Kaby Lake Refresh" (14 nm) ====
* All models support: ''[[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[SSSE3]], SSE4.1, SSE4.2, [[Software Guard Extensions|SGX]], [[Intel MPX|MPX]], Enhanced Intel [[Engineering:SpeedStep|SpeedStep]] Technology (EIST), Intel 64, XD bit (an [[NX bit]] implementation), Intel VT-x, Intel VT-d, [[AES instruction set|AES-NI]], [[Smart Cache]]'', and configurable TDP (cTDP) down.<ref>{{cite web|url=http://www.cpu-world.com/CPUs/Celeron_Dual-Core/Intel-Celeron%203867U.html |title=Intel Celeron 3867U Mobile processor |publisher=Cpu-world.com |access-date=2019-08-06}}</ref>
{{cpulist|skylake|skylake|model=Celeron 3867U|ark=189270|cores=2|l3=2|threads=2|mult=18|turbo={{n/a}}|gfxmodel=610|gfxclock=300–900|tdp=15|date=January 2019|price=$107
|sspec1=SRESK|step1=Y0|sock=1356|part1=FJ8067703283011}}
{{end}}

=== Coffee Lake based Celerons ===

==== "Whiskey Lake-U" (14 nm) ====
{{cpulist|skylake|skylake|model=Celeron 4205U|ark=189309|cores=2|l3=2|threads=2|mult=18|turbo={{n/a}}|gfxmodel=U610|gfxclock=300–900|tdp=15|date=January 2019|price=$107|sspec1=SRESP|step1=W0|sock=1528|part1=CL8068404080803|sspec2=SRFG2|step2=V0|part2=CL8068404080807}}
{{cpulist|skylake|skylake|model=Celeron 4305U|ark=193561|cores=2|l3=2|threads=2|mult=22|turbo={{n/a}}|gfxmodel=U610|gfxclock=300–900|tdp=15|date=April 2019|price=$107|sspec1=SRFA5|step1=V0|sock=1528|part1=CL8068404066103}}
{{cpulist|skylake|skylake|model=Celeron 4305UE|ark=193565|cores=2|l3=2|threads=2|mult=20|turbo={{n/a}}|gfxmodel=U620|gfxclock=300–1000|tdp=15|date=June 2019|price=$107|sspec1=SRFDZ|step1=V0|sock=1528|part1=CL8068404210005}}
{{end}}

=== Comet Lake based Celerons ===

==== "[[Engineering:Comet Lake|Comet Lake-U]]" (14 nm) ====
{{cpulist|skylake|skylake|model=Celeron 5205U|ark=197890|cores=2|l3=2|threads=2|mult=19|turbo={{n/a}}|gfxmodel=U610|gfxclock=300–900|tdp=15|date=October 2019|price=$107|sspec1=SRGL3|step1=V0|sock=1528|part1=FJ8070104307803}}
{{cpulist|skylake|skylake|model=Celeron 5305U|ark=197889|cores=2|l3=2|threads=2|mult=23|turbo={{n/a}}|gfxmodel=U610|gfxclock=300–900|tdp=15|date=May 2020|price=$107|sspec1=SRGL4|step1=V0|sock=1528|part1=FJ8070104307903}}
{{end}}

=== Tiger Lake based Celerons ===

==== "Tiger Lake-UP3" (10 nm SuperFin) ====
* All models support: ''SSE4.1, SSE4.2, AVX2, FMA3, [[Engineering:SpeedStep|Speed Shift Technology]] (SST), Intel 64, Intel VT-x, Intel VT-d, [[AES instruction set|AES-NI]], [[Smart Cache]], [[Deep learning|DL Boost]], [[3D XPoint|Optane]] ''memory'', GNA 2.0, [[Engineering:Image processor|IPU6]], [[Engineering:Thunderbolt (interface)#Thunderbolt 4|TB4]]''.
{{cpulist|tigerlake|tigerlake|model=Celeron 6305|ark=208646|cores=2|l3=4|threads=2|freq=1.8|turbo={{n/a}}|gfxmodel=UHD Graphics (48 EU)|gfxclock=?–1250|tdp=15|mem={{nowrap|2× LPDDR4X-3733}}<br>2× DDR4-3200|date=October 2020|price=$107|sspec1=SRK0B|step1=B1|sock=1449|part1=FH8069004531901}}
{{cpulist|tigerlake|tigerlake|model=Celeron 6305E|ark=208072|cores=2|l3=4|threads=2|freq=1.8|turbo={{n/a}}|gfxmodel=UHD Graphics (48 EU)|gfxclock=?–1250|tdp=15|mem={{nowrap|2× LPDDR4X-3733}}<br>2× DDR4-3200|date=October 2020|price=$107|sspec1=SRK17|step1=B1|sock=|part1=FH8069004542700}}
{{end}}

=== Tremont based Celerons ===

===="[[Engineering:Tremont (microarchitecture)|Jasper Lake]]" (10 nm)====
* All models support: [[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[SSSE3]], SSE4.1, SSE4.2, Enhanced Intel [[Engineering:SpeedStep|SpeedStep]] Technology (EIST), Intel 64, XD bit (an [[NX bit]] implementation), Intel SGX, Intel VT-x, Intel VT-d, [[AES instruction set|AES-NI]], Intel SHA Extensions, Intel SGX, [[Supervisor Mode Access Prevention|SMAP/SMEP]]
* Package size: 35 mm x 24 mm
* DDR4/LPDDR4 dual-channel memory controller supporting up to 16 GB
* Display controller with 1 MIPI DSI 1.2 port and 3 DDI ports (eDP 1.4b, MIPI DSI 1.2, DP 1.4a, or HDMI 2.0b)
* Integrated Intel [[Engineering:List of Intel graphics processing units#Gen11|HD Graphics (Gen11)]] GPU
* PCI Express 3.0 controller supporting 8 lanes (multiplexed); 4 lanes available externally
* Two USB 3.2 2x1 ports (a.k.a. USB 3.1)
* Four USB 3.2 1x1 ports (a.k.a. USB 3.0)
* Eight USB 2.0 ports
* Two SATA-600 ports
* Integrated HD audio controller
* Integrated image signal processor supporting four cameras (three concurrent)
* Integrated memory card reader supporting SDIO 3.0 and eMMC 5.1
* Serial I/O supporting SPI, HSUART (serial port) and I2C
* Integrated CNVi with Wi-Fi 6 (IEEE 802.11ax 1x1 and 2x2) and Bluetooth 5.x (using UART/I2S/USB2)
{{cpulist|tremont|jasperlake|model=Celeron N4500|ark=212326|cores=2|freq=1.1|burst=2.8|gfxmodel=UHD Graphics (16 EUs)
|gfxclock=350-750|l2=1.5|l3=4|mem=2 × DDR4/LPDDR4X-2933|vmin=|vmax=|tdp=6|sdp=4.8|sock1=FC-BGA 1338|date=January 2021|price=|links=1
  |sspec1=SRKH0|step1=A1|part1=DC8069704609907}}
{{cpulist|tremont|jasperlake|model=Celeron N5100|ark=212329|cores=4|freq=1.1|burst=2.8|gfxmodel=UHD Graphics (24 EUs)
|gfxclock=350-800|l2=1.5|l3=4|mem=2 × DDR4/LPDDR4X-2933|vmin=|vmax=|tdp=6|sdp=4.8|sock1=FC-BGA 1338|date=January 2021|price=
  |sspec1=SRKGZ|step1=A1|part1=DC8069704609906}}
{{end}}

== Embedded processors ==

=== Nehalem based Celerons ===

====Celeron ''(single-core)''====

===== "[[Engineering:Xeon#C3500/C5500-series "Jasper Forest"|Jasper Forest]]" (45 nm) =====
* All models support: ''[[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[SSSE3]], Enhanced Intel [[Engineering:SpeedStep|SpeedStep]] Technology (EIST), Intel 64, XD bit (an [[NX bit]] implementation), Intel VT-x, Intel VT-d, HyperThreading, Smart Cache, ECC memory.
* Single-Core version of Xeon C3500-Series
{{cpulist|nehalem|jasperforest|model=Celeron P1053|ark=47647
|mult=10|cores=1|turbo={{n/a}}|l2=1 × 256|l3=2|memspeed=800|dmi=2.5|vmin=1.0|vmax=1.5|tdp=30|date=February 2010|price=$160|links=1
|sspec1=SLBWN|step1=B0|part1=AT80612004743AA}}
{{end}}

===Sandy Bridge based Celerons===

====Celeron ''(single-core)''====

====="Gladden" (32 nm)=====

* All models support: ''[[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[SSSE3]], SSE4.1, SSE4.2, [[Advanced Vector Extensions|AVX]], Enhanced Intel [[Engineering:SpeedStep|SpeedStep]] Technology (EIST), Intel 64, XD bit (an [[NX bit]] implementation), Intel VT-x, EPT, [[Hyper-threading]], Smart Cache, ECC memory.''
* Transistors:
* [[Engineering:Die (integrated circuit)|Die]] size:
{{cpulist|bridge-e|sandybridge|model=Celeron 725C|ark=68334
|cores=1|l3=1.5|mult=13|turbo={{n/a}}|tdp=10|mem=1 × DDR3-1333|date=Q2 2012|price=$74|links=1
|sspec1=SR0NX|step1=Q0|sock1=FC-BGA10|part1=AV8062701147000}}
{{end}}

===Tremont based Celerons===

===="[[Engineering:Tremont (microarchitecture)|Elkhart Lake]]" (10 nm SuperFin)====
* All models support: ''[[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[SSSE3]], SSE4.1, SSE4.2, Intel 64, XD bit (an [[NX bit]] implementation), Intel VT-x, Intel VT-d, AES-NI.
* GPU is based on Gen11 [[Engineering:Intel HD Graphics|Intel HD Graphics]], with up to 32 execution units, and supports up to 3 displays (4K @ 60 Hz) through [[Engineering:HDMI|HDMI]], [[DisplayPort|DP]], eDP, or [[Display Serial Interface|DSI]].
* [[System on a chip|SoC]] peripherals include 4 × USB 2.0/3.0/3.1, 2 × [[Engineering:Serial ATA|SATA]],  3 × [[2.5GBASE-T and 5GBASE-T|2.5GbE]] LAN, UART, and up to 8 lanes of [[Engineering:PCI Express|PCI Express]] 3.0 in x4, x2, and x1 configurations.
* Package size: 35&nbsp;mm × 24&nbsp;mm
{{end}}

===Tiger Lake based Celerons===

==== "Tiger Lake-H" (10 nm SuperFin) ====
* All models support: ''SSE4.1, SSE4.2, AVX2, [[AVX-512]], FMA3, [[Engineering:SpeedStep|Speed Shift Technology]] (SST), Intel 64, Intel VT-x, Intel VT-d, [[AES instruction set|AES-NI]], [[Smart Cache]], [[Deep learning|DL Boost]], [[3D XPoint|Optane]] ''memory'', GNA 2.0, [[Engineering:Image processor|IPU6]], [[Engineering:Thunderbolt (interface)#Thunderbolt 4|TB4]]''.
{{cpulist|tigerlake|tigerlake|model=Celeron 6600HE|ark=217370|cores=2|l3=8|threads=2|freq=2.6|turbo={{n/a}}|gfxmodel=UHD Graphics (16&nbsp;EU)|gfxclock=350–1100|tdp=35 |mem=2× DDR4-3200|date=August 2021|price=$107|sspec1=SRKX7|step1=R0|part1=FH8069004638144}}
{{end}}

== See also ==
* Intel Celeron
* [[Engineering:List of Intel Pentium microprocessors|List of Intel Pentium microprocessors]]
* [[Engineering:List of Intel Core i3 microprocessors|List of Intel Core i3 microprocessors]]
* [[Engineering:List of Intel Core i5 microprocessors|List of Intel Core i5 microprocessors]]
* [[Engineering:List of Intel Core i7 microprocessors|List of Intel Core i7 microprocessors]]
* [[Engineering:List of Intel Core i9 microprocessors|List of Intel Core i9 microprocessors]]

==Notes==
{{reflist|group=note}}

== References ==
{{Reflist}}
*{{Note|Celeron220}} [http://xtreview.com/addcomment-id-3556-view-new-celeron-220.html New Celeron 220], Xtreview 15 October 2007

==External links==
* [http://qdms.intel.com/MDDS/MDDSView.aspx Search MDDS Database]
* [http://ark.intel.com/ Intel ARK Database]
* [http://www.reghardware.co.uk/2006/04/11/yonah_celeron_ms_ship/ 'Yonah' Celeron M 420, 430 ship in Japan]
* [http://pc.watch.impress.co.jp/img/pcw/docs/360/112/html/1.jpg.html Intel CPU Transition Roadmap 2008-2013]
* [http://pc.watch.impress.co.jp/img/pcw/docs/360/112/html/2.jpg.html Intel Desktop CPU Roadmap 2004-2011]
* [http://www.intel.com/support/processors/celeron/sb/cs-007445.htm Intel Celeron desktop processor product order code table]
* [http://www.intel.com/support/processors/mobile/celeron/sb/cs-007472.htm Intel Celeron mobile processor product order code table]
{{Intel processors|*}}

[[Category:Intel x86 microprocessors|*Celeron]]
[[Category:Lists of microprocessors|Intel Celeron]]

{{Sourceattribution|List of Intel Celeron microprocessors|1}}