View source for Engineering:Nehalem (microarchitecture)

{{Short description|CPU microarchitecture by Intel}}
{{Infobox CPU
| name = Nehalem
| image = Intel Nehalem.jpg
| caption = Logo for Core i7 Bloomfield processors
| image_size = 150px
| created = {{start date and age|November 11, 2008}}
| cores = 1-6 (1-8 Xeon)
<!-- (2-12)
| cores1 = 6 (12) (Extreme)
| cores2 = 4-8 (4-16) (Xeon) -->
| transistors = 731M to 2300M 45 nm
<!-- (C0, D0)
| transistors1 = 774M 45 nm (B0, B1)
| transistors2 = 2,300M 45 nm (D0) -->
| clock = 1.06 GHz to 3.33 GHz
| l1cache = 64 KB per core (32 KB data + 32 KB instructions)
| l2cache = 256 KB per core
| l3cache = 2 MB to 24 MB shared 
| dmi-slowest = 2
| qpi-slowest = 4.80
| qpi-fastest = 6.40
| gpu =
| arch = [[X86-64|x86-64]]
| microarch = Nehalem
| extensions1 = 
| instructions = [[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[SSSE3]], [[SSE4]], SSE4.1, SSE4.2
| extensions = VT-x, VT-d
| sock1 = LGA 1156
| sock2 = LGA 1366
| sock3 = LGA 1567
| sock4 = µPGA 988
| predecessor = Core (tock)<br />[[Engineering:Penryn (microarchitecture)|Penryn (tick)]]
| successor = [[Engineering:Westmere (microarchitecture)|Westmere (tick)]]<br />[[Engineering:Sandy Bridge|Sandy Bridge (tock)]]
|size-from=45 nm
| support status = Unsupported
|soldby=[[Company:Intel|Intel]]|designfirm=Intel|manuf1=Intel|model1=Core i5-7xx|model2=Core i7-8xx|model3=Core i7-9xx Extreme|model4=Xeon 3000/5000/7000|model5=Mobile Core i7-7xxQM|model6=Mobile Core i7-8xxQM|core1=[[Engineering:Clarksfield (microprocessor)|Clarksfield]]|core2=[[Engineering:Lynnfield (microprocessor)|Lynnfield]]|core3=[[Engineering:Bloomfield (microprocessor)|Bloomfield]]|core4=Jasper  Forest|core5=Gainestown (Nehalem-EP)|core6=Beckton (Nehalem-EX)|core7=<s>Aubrurndale</s>|core8=<s>Havendale</s>|model7=Mobile Core i7-9xxXM Extreme}}

'''Nehalem''' {{IPAc-en|n|ə|ˈ|h|eɪ|l|əm}}<ref>{{Citation |title=I Am Nehalem |url=http://www.metacafe.com/watch/830178/i_am_nehalem/}}</ref> is the codename for [[Company:Intel|Intel]]'s 45 nm [[Microarchitecture|microarchitecture]] released in November 2008.<ref>{{Citation
 |title=Nehalem = i7: Intel unveils new Core processor brand
 |first=Wolfgang
 |last=Gruener
 |date=August 10, 2008
 |publisher=TG Daily
 |url=http://www.tgdaily.com/content/view/38818/135/
 |access-date=August 11, 2008
 |archive-date=August 14, 2009
 |archive-url=https://web.archive.org/web/20090814085245/http://www.tgdaily.com/content/view/38818/135
 |url-status=dead
 }}</ref> It was used in the first generation of the [[Engineering:Intel Core|Intel Core]] i5 and i7 processors, and succeeds the older Core microarchitecture used on [[Engineering:Intel Core 2|Core 2 processors]].<ref>{{Citation
 |title=Intel Details Upcoming New Processor Generations
 |url=http://www.intel.com/pressroom/archive/releases/20070328fact.htm
 |publisher=Intel Corporation |date=March 28, 2007
}}</ref> The term "Nehalem" comes from the Nehalem River.<ref>{{Citation
 |title=Intel's new faster chip right on AMD's heels
 |first=King |last=Ian
 |date=October 20, 2008 |publisher=The Seattle Times
 |url=http://seattletimes.nwsource.com/html/businesstechnology/2008125540_intel20.html
}}</ref><ref>{{Citation
 |title=IAMD vs Intel: The future of desktop CPUs
 |first=George |last=Jones
 |date=February 9, 2008 |publisher=PC Advisor UK
 |url=http://www.pcadvisor.co.uk/news/index.cfm?NewsID=12061&pn=3
}}</ref>

Nehalem is built on the 45 nm process, is able to run at higher clock speeds without sacrificing efficiency, and is more energy-efficient than [[Engineering:Penryn (microarchitecture)|Penryn]] microprocessors. [[Hyper-threading]] is reintroduced, along with a reduction in L2 cache size, as well as an enlarged L3 cache that is shared among all cores. Nehalem is an architecture that differs radically from [[Engineering:NetBurst|NetBurst]], while retaining some of the latter's minor features.

Nehalem later received a die-shrink to 32 nm with [[Engineering:Westmere (microarchitecture)|Westmere]], and was fully succeeded by "second-generation" [[Engineering:Sandy Bridge|Sandy Bridge]] in January 2011.

==Technology==
[[File:Intel Nehalem arch.svg|300px|right|thumb|Microarchitecture of a processor core in the quad-core implementation]]

* Cache line block on L2/L3 cache was reduced from 128 bytes in NetBurst & Merom/Penryn to 64 bytes per line in this generation (same size as Yonah and Pentium M).
* [[Hyper-threading]] reintroduced.
* Intel Turbo Boost 1.0.<ref>{{Cite web |url=http://files.shareholder.com/downloads/INTC/0x0x348508/C9259E98-BE06-42C8-A433-E28F64CB8EF2/TurboBoostWhitePaper.pdf |title=Archived copy |access-date=November 30, 2015 |archive-date=November 29, 2015 |archive-url=https://web.archive.org/web/20151129231923/http://files.shareholder.com/downloads/INTC/0x0x348508/C9259E98-BE06-42C8-A433-E28F64CB8EF2/TurboBoostWhitePaper.pdf |url-status=dead }}</ref>
* 2–24&nbsp;MiB L3 cache with [[Smart Cache]] in some models.
* Instruction Fetch Unit (IFU) containing second-level [[Branch predictor|branch predictor]] with two level Branch Target Buffer (BTB) and Return Stack Buffer (RSB). Nehalem also supports all predictor types previously used in Intel's processors like Indirect Predictor and Loop Detector.<ref>{{Cite web|url=https://www.realworldtech.com/nehalem/4/|title=Inside Nehalem: Intel's Future Processor and System|first=David|last=Kanter}}</ref>
* sTLB (second level unified [[Translation lookaside buffer|translation lookaside buffer]]) (i.e. both instructions and data) that contains 512 entries for small pages only, and is again 4 way associative.<ref>{{Cite web|url=https://www.realworldtech.com/nehalem/8/|title=Inside Nehalem: Intel's Future Processor and System|first=David|last=Kanter}}</ref>
* 3 integer ALU, 2 vector ALU and 2 AGU per core.<ref>{{Cite web|url=https://www.realworldtech.com/sandy-bridge/6/|title=Intel's Sandy Bridge Microarchitecture|first=David|last=Kanter}}</ref>
* Native (all processor cores on a single die) quad- , hex-, and octa-core processors
* [[Intel QuickPath Interconnect]] in HEDT, server, and workstation models and [[Engineering:Direct Media Interface|Direct Media Interface]] on other models replacing the legacy front side bus.
* 64&nbsp;KB L1 cache per core (32&nbsp;KB L1 data and 32&nbsp;KB L1 instruction), and 256&nbsp;KB L2 cache per core.
* Integration of [[Engineering:PCI Express|PCI Express]] and [[Engineering:Direct Media Interface|DMI]] into the processor in mid-range models, replacing the northbridge.
* Integrated [[Engineering:Memory controller|memory controller]] supporting two or three memory channels of DDR3 SDRAM or four [[Fully Buffered DIMM|FB-DIMM2]] channels.
* Second-generation Intel Virtualization Technology, which introduced Extended Page Table support, virtual processor identifiers (VPIDs), and [[Non-maskable interrupt|non-maskable interrupt]]-window exiting. <ref>{{cite web|url=http://www.realworldtech.com/nehalem/8/|title=Inside Nehalem: Intel's Future Processor and System|access-date=December 29, 2014}}</ref>
* SSE4.2 and <code>POPCNT</code> instructions.
* Macro-op fusion now works in 64-bit mode.
* 20 to 24 pipeline stages.<ref>{{cite web|url=http://www.bit-tech.net/hardware/cpus/2008/11/03/intel-core-i7-nehalem-architecture-dive/5|title=Feature - Intel Core i7 - Nehalem Architecture Dive|work=bit-tech|access-date=December 29, 2014}}</ref>

:{| class="wikitable" style="text-align: center"
|+ Translation&nbsp;lookaside&nbsp;buffer&nbsp;sizes<ref>{{Cite web|url=https://www.intel.com/content/www/us/en/developer/overview.html|title=Intel Developer Zone|website=Intel}}</ref>
|-
! colspan=2 | Cache
! colspan=2 | Page Size
|-
! Name || Level || 4&nbsp;KB || 2&nbsp;MB
|- 
| DTLB || 1st || 64 || 32
|- 
| ITLB || 1st || 128 || 7 / logical core
|- 
| STLB || 2nd || 512 || none
|}

==Performance and power improvements==
It has been reported that Nehalem has a focus on performance, thus the increased core size.<ref name="kaigai412">{{Citation
 |title=Intel's dual teamed approached to micro-architecture development |date=January 29, 2008
 |language=ja |work=PC Watch
 |url=http://pc.watch.impress.co.jp/docs/2008/0129/kaigai412.htm
}}</ref>
Compared to Penryn, Nehalem has:
* 10&ndash;25% better single-threaded performance / 20&ndash;100% better multithreaded performance at the same power level
* 30% lower [[Physics:Energy conversion efficiency|power consumption]] for the same [[Computer performance|performance]]
* On average, Nehalem provides a 15&ndash;20% clock-for-clock increase in performance per core.

Overclocking is possible with Bloomfield processors and the X58 chipset. [[Engineering:Lynnfield (microprocessor)|Lynnfield]] processors use a PCH removing the need for a northbridge.<ref>{{Citation
 |title=Intel: No Overclocking for Mainstream Nehalems
 |first=Bogdan |last=Botezatu |date=April 22, 2008
 |publisher=Softpedia
 |url=http://news.softpedia.com/news/Intel-No-Overclocking-for-Mainstream-Nehalems-84019.shtml}}</ref>

Nehalem processors incorporate [[SSE4#SSE4.2|SSE4.2]] [[SIMD]] instructions, adding seven new instructions to the SSE 4.1 set in the Core 2 series. The Nehalem architecture reduces atomic operation latency by 50% in an attempt to eliminate overhead on atomic operations such as the <code>LOCK CMPXCHG</code> [[Compare-and-swap|compare-and-swap]] instruction.<ref>{{Citation |title=NO EXECUTE! |url=http://www.emulators.com/docs/nx24_hot_chips.htm}}</ref>

==Variants==
{| class="wikitable" style="font-size: 85%; text-align: center"
|-
!Processing Cores (interface)!! Process !! Die Size 
!million transistors!! CPUID !! Model !! Stepping !! Mobile !! Desktop, UP Server !! DP Server !! MP Server
|- align="center"
| align="left"| '''Eight-Core''' (Quad-Channel) || rowspan="4" | 45&nbsp;nm|| 684&nbsp;mm² 
|2.300<ref name=":0">{{Cite web|title=Nehalem - Microarchitectures - Intel - WikiChip|url=https://en.wikichip.org/wiki/intel/microarchitectures/nehalem_(client)|access-date=2021-02-09|website=en.wikichip.org|language=en}}</ref>|| 206E6 || 46 || D0
| || || || Beckton (80604)
|- align="center"
| align="left"| '''Quad-Core''' (Triple-Channel) || 263&nbsp;mm² 
|731|| 106A4<br />106A5 || 26 || C0/C1<br />D0
| || [[Engineering:Bloomfield (microprocessor)|Bloomfield]] (80601) || Gainestown (80602)||
|- align="center"
| align="left"| '''Quad-Core''' (Dual-Channel, PCIe) ||296&nbsp;mm² 
|774|| 106E4<br />106E5 || 30 || B0<br />B1
| [[Engineering:Clarksfield (microprocessor)|Clarksfield]] (80607) || [[Engineering:Lynnfield (microprocessor)|Lynnfield]] (80605) || Jasper Forest (80612) ||
|- align="center"
| align="left"| '''Dual-Core''' (Dual-Channel, PCIe, Graphics Core)||
|?|| || ||
| Auburndale (80608) ''(canceled)'' || Havendale (80606) ''(canceled)'' || ||
|}

<!-- This information is available in the lists
* Extreme processors have an unlocked [[Engineering:CPU multiplier|clock multiplier]].
* All processors use a 133MHz Base Clock.
-->

* Lynnfield processors feature 16 [[Engineering:PCI Express|PCIe]] lanes, which can be used in 1x16 or 2x8 configuration.
* <sup>1</sup> 6500 series scalable up to 2 sockets, 7500 series scalable up to 4/8 sockets.<ref>{{cite web|url=http://www.anandtech.com/show/3648/xeon-7500-dell-r810/4|title=AnandTech - High-End x86: The Nehalem EX Xeon 7500 and Dell R810|author=Johan De Gelas|access-date=December 29, 2014}}</ref>

===Server, workstation, and desktop processors===
{{Main|Engineering:List of Intel Core i5 processors|Engineering:List of Intel Core i7 processors|Engineering:List of Intel Xeon processors (Nehalem-based)}}
{| class="wikitable" style="font-size: 90%" border="1"
|-
! rowspan=2 | Codename
! rowspan=2 | Market
! rowspan=2 | Cores<br />(threads)
! rowspan=2 | Socket
! colspan=2 rowspan=2 | Processor<br />Branding & Model
! rowspan=2 | CPU<br />[[Clock rate]]
! rowspan=2 | Turbo
! rowspan=2 | TDP
! colspan=2 | Interfaces
! rowspan=2 | [[CPU cache#Multi-level caches|L3<br />cache]]
! rowspan=2 | Release Date
! rowspan=2 | Price for<br />1k Unit
|-
! Chipset
! Memory
|-
| rowspan=11 | ''Beckton''<sup>1</sup>
| rowspan=11 | MP Server /<br />DP Server
| rowspan=4 | 8 (16)
| rowspan=11 | LGA<br />1567
| rowspan=11 | Xeon
7000<ref>{{Citation
 |title=AMD launches 12-core Opteron server chips, Intel counters with the 8-core Xeon 7500
 |publisher=engadedget.com |date=March 31, 2010
 |url=https://www.engadget.com/2010/03/30/amd-launches-12-core-opteron-server-chips-intel-counters-with-t/
 |access-date=March 31, 2010}}</ref>
| X7560
| 2.26&nbsp;GHz
| rowspan=9 {{yes}}
| rowspan=3 | 130 [[Watt|W]]
| rowspan=3 | 4× [[Intel QuickPath Interconnect|QPI]] 6.4 [[Transfer (computing)|GT]]/s
| rowspan=11 | DDR3-800 /<br />1066<br />(Up to 4x with<br />SMB-Ready<br />motherboard)
| 24 [[Megabyte|MB]]
| rowspan=11 | 2010-03-30<ref>{{Citation
 |title       = Intel's next bunch of fun CPUs moves to 2010
 |access-date  = March 1, 2009
 |author      = Nebojsa Novakovic
 |date        = February 12, 2009
 |publisher   = CNN International
 |url         = http://www.theinquirer.net/inquirer/opinion/976/1050976/intel-bunch-fun-cpus-moves-2010
 |url-status     = unfit
 |archive-url  = https://web.archive.org/web/20090304215925/http://www.theinquirer.net/inquirer/opinion/976/1050976/intel-bunch-fun-cpus-moves-2010
 |archive-date = March 4, 2009
}}</ref>
| $3692
|-
| X7550
| rowspan=2 | 2.0&nbsp;GHz
| rowspan=2 | 18&nbsp;MB
| $2837
|-
| X6550
| $2461
|-
| L7555
| 1.86&nbsp;GHz
| 95&nbsp;W
| 4× QPI 5.86 GT/s
| 24&nbsp;MB
| $3157
|-
| rowspan=4 | 6 (12)
| E7540
| rowspan=2 | 2.0&nbsp;GHz
| rowspan=3 | 105&nbsp;W
| rowspan=2 | 4× QPI 6.4 GT/s
| 18&nbsp;MB
| $1980
|-
| E6540
| rowspan=2 | 12&nbsp;MB
| $1712
|-
| E7530
| rowspan=2 | 1.86&nbsp;GHz
| rowspan=3 | 4× QPI 5.86 GT/s
| $1391
|-
| L7545
| 95&nbsp;W
| rowspan=3 | 18&nbsp;MB
| $2087
|-
| 6 (6)
| X7542
| 2.66&nbsp;GHz
| 130&nbsp;W
| $1980
|-
| rowspan=2 | 4 (8)
| E7520
| 1.86&nbsp;GHz
| rowspan=2 {{no}}
| rowspan=2 | 105&nbsp;W
| rowspan=2 | 4× QPI 4.8 GT/s
| $856
|-
| E6510
| 1.73&nbsp;GHz
| 12&nbsp;MB
| $744
|-
| rowspan=18 | ''Gainestown''
| rowspan=23 | DP Server<ref name="Intel Xeon Processor 5500 Series">
{{Citation
 |date=April 1, 2009
 |title=Intel Xeon Processor 5500 Series Product brief, (Document Number: 321579-001US)
 |publisher=Intel
 |access-date=August 27, 2010
 |url=http://www-2000.ibm.com/partnerworld/ap/kr/intel_xeon_5500_prodbrief.pdf
}}</ref>
| rowspan=11 | 4 (8)
| rowspan=35 | LGA<br />1366
| rowspan=23 | Xeon
5000<ref name="macnn1">{{Citation |title=Core i7 to make leap to Xeon in early 2009 |publisher=Legacy.macnn.com |url=http://legacy.macnn.com/articles/08/11/13/xeon.i7.in.early.2009/ |access-date=November 24, 2008 |url-status=dead |archive-url=https://web.archive.org/web/20081207114716/http://legacy.macnn.com/articles/08/11/13/xeon.i7.in.early.2009/ |archive-date=December 7, 2008 }}</ref>
| W5590
| 3.33 [[Hertz|GHz]]
| rowspan=11 {{yes}}
| rowspan=2 | 130&nbsp;W
| rowspan=5 | 2× QPI 6.4 GT/s
| rowspan=5 | 3× DDR3-1333<sup>1</sup>
| rowspan=11 | 8&nbsp;MB
| 2009-08-09
| $1600
|-
| W5580
| 3.2&nbsp;GHz
| $1500
|-
| X5570
| 2.93&nbsp;GHz
| rowspan=3 | 95&nbsp;W
| $1286
|-
| X5560
| 2.8&nbsp;GHz
| $1072
|-
| X5550
| 2.66&nbsp;GHz
| $858
|-
| E5540
| 2.53&nbsp;GHz
| rowspan=3 | 80&nbsp;W
| rowspan=6 | 2× 5.86 GT/s
| rowspan=6 | 3× DDR3-1066<sup>1</sup>
| $744
|-
| E5530
| 2.4&nbsp;GHz
| $530
|-
| E5520
| 2.26&nbsp;GHz
| $373
|-
| L5530
| 2.4&nbsp;GHz
| rowspan=3 | 60&nbsp;W
| 2009-08-09
| $744
|-
| L5520
| 2.26&nbsp;GHz
| rowspan=2 | 2009-03-30
| $530
|-
| L5518
| 2.13&nbsp;GHz
| $
|-
| rowspan=4 | 4 (4)
| E5507
| 2.26&nbsp;GHz
| rowspan=4 {{no}}
| rowspan=2 | 80&nbsp;W
| rowspan=4 | 2× 4.8 GT/s
| rowspan=4 | 3× DDR3-800<sup>1</sup>
| rowspan=4 | 4&nbsp;MB
| 2010-03-16
|rowspan=2|$266
|-
| E5506
| 2.13&nbsp;GHz
| rowspan=4 | 2009-03-29
|-
| L5506
| 2.13&nbsp;GHz
| 60&nbsp;W
| $423
|-
| E5504
| 2.0&nbsp;GHz
| 80&nbsp;W
| $224
|-
| 2 (4)
| L5508
| 2.0&nbsp;GHz
| {{yes}}
| 38&nbsp;W
| 2× 5.86 GT/s
| 3× DDR3-1066
| 8&nbsp;MB
| $
|-
| rowspan=2 | 2 (2)
| E5503
| 2.0&nbsp;GHz
| rowspan=2 {{no}}
| rowspan=2 | 80&nbsp;W
| rowspan=2 | 2× 4.8 GT/s
| rowspan=2 | 3× DDR3-800
| rowspan=2 | 4&nbsp;MB
| 2010-03-16
| $224
|-
| E5502
| 1.86&nbsp;GHz
| 2009-03-29
| $188
|-
| rowspan=5 | ''Jasper''
''Forest''
| rowspan=3 | 4 (8)
| EC5549
| 2.53&nbsp;GHz
| rowspan=3 {{yes}}
| 85&nbsp;W
| 1× 5.86 GT/s
| 3× DDR3-1333
| rowspan=4 | 8&nbsp;MB
| rowspan=5 | 2010-02-11
| $530
|-
| LC5528
| 2.13&nbsp;GHz
| 60&nbsp;W
| rowspan=3 | 1× 4.8 GT/s
| rowspan=3 | 3× DDR3-1066
| rowspan=2 | $519
|-
| LC5518
| 1.73&nbsp;GHz
| 48&nbsp;W
|-
| 4 (4)
| EC5509
| 2&nbsp;GHz
| rowspan=2 {{no}}
| 85&nbsp;W
| $265
|-
| 2 (4)
| EC5539
| 2.27&nbsp;GHz
| 65&nbsp;W
| 1× 5.86 GT/s
| 3× DDR3-1333
| 4&nbsp;MB
| $387
|-
| rowspan=9 | ''Bloomfield''
| rowspan=19 | UP Server<ref name="Intel Xeon Processor 3500 Series">{{Citation
 |title=Intel Xeon Processor 3500 Series
 |date=April 1, 2009
 |publisher=Intel
 |url=http://www.intel.com/cd/channel/reseller/asmo-na/eng/products/server/processors/3500/feature/index.htm
 |access-date=April 10, 2009}}</ref>
| rowspan=7 | 4 (8)
| rowspan=19 | Xeon
3000<ref name="Intel to Add New Nehalem Xeon Processor">{{Citation
 |title=Intel to Add New Nehalem Xeon Processor
 |last=Teglet |first=Traian
 |date=November 13, 2008
 |publisher=softpedia
 |url=http://news.softpedia.com/news/Intel-to-Add-New-Nehalem-Xeon-Processors-97856.shtml
 |access-date = November 13, 2008}}</ref>
| W3580
| 3.33&nbsp;GHz
| rowspan=7 {{yes}}
| rowspan=9 | 130&nbsp;W
| rowspan=2 | 1× QPI 6.4 GT/s
| rowspan=2 | 3× DDR3-1333
| rowspan=7 | 8&nbsp;MB
| 2009-08-09
|rowspan=2| $999
|-
| W3570
| 3.2&nbsp;GHz
| 2009-03-29<ref name="Intel to Add New Nehalem Xeon Processor" />
|-
| W3565
| 3.2&nbsp;GHz
| rowspan=7 | 1× QPI 4.8 GT/s
| rowspan=8 | 3× DDR3-1066
| 2009-11-01
| rowspan=3|$562
|-
| W3550
| 3.06&nbsp;GHz
| 2009-08-09
|-
| W3540
| 2.93&nbsp;GHz
| 2009-03-29<ref name="Intel to Add New Nehalem Xeon Processor"/>
|-
| W3530
| 2.8&nbsp;GHz
| 2010-03-16
| $294
|-
| W3520
| 2.66&nbsp;GHz
| rowspan=3 | 2009-03-29<ref name="Intel to Add New Nehalem Xeon Processor"/>
| $284
|-
| rowspan=2| 2 (2)
| W3505
| 2.53&nbsp;GHz
| rowspan=3 {{no}}
| rowspan=2 | 4&nbsp;MB
| $
|-
| W3503
| 2.4&nbsp;GHz
| $
|-
| rowspan=3 | ''Jasper''
''Forest''
| 4 (4)
| EC3539
| 2.13&nbsp;GHz
| 65&nbsp;W
| rowspan=3 | DMI
| 8&nbsp;MB
| rowspan=3 | 2010-02-11
| rowspan=2 | $302
|-
| 2 (4)
| LC3528
| rowspan=2 | 1.73&nbsp;GHz
| {{yes}}
| 35&nbsp;W
| rowspan=2 | 3× DDR3-800
| 4&nbsp;MB
|-
| 1 (1)
| LC3518
| {{no}}
| 23&nbsp;W
| 2&nbsp;MB
| $192
|-
| rowspan=7|''Lynnfield''
| rowspan=6 | 4 (8)
| rowspan=7|LGA<br />1156
| X3480
| 3.06&nbsp;GHz
| rowspan=7 {{yes}}
| rowspan=5|95&nbsp;W
| rowspan=7|DMI
| rowspan=7|2× DDR3-1333
| rowspan=23| 8&nbsp;MB
| 2010-05-30
| $612
|-
| X3470
| 2.93&nbsp;GHz
| rowspan=6| 2009-09-08
| $589
|-
| X3460
| 2.8&nbsp;GHz
| $316
|-
| X3450
| 2.66&nbsp;GHz
| $241
|-
| X3440
| 2.53&nbsp;GHz
| $215
|-
| L3426
| 1.86&nbsp;GHz
| 45&nbsp;W
| $284
|-
| 4 (4)
| X3430
| 2.4&nbsp;GHz
| 95&nbsp;W
| $189
|-
| rowspan=7 | ''Bloomfield''
| rowspan=7 | Enthusiast<br />Desktop<ref name="intel core i7 datasheet">
{{cite web
 | url=http://download.intel.com/design/processor/datashts/320835.pdf
 | date = November 1, 2008
 | title = Intel Core i7 Processor Extreme Datasheet, Volume 2, (Document Number: 320835-002)
 | access-date = March 24, 2009
 | publisher = Intel
}}</ref>
| rowspan=13 | 4 (8)
| rowspan=7 | LGA<br />1366
| rowspan=2 | Core i7<br />Extreme
| 975X<ref name="fundzilla 950 975">{{Citation
 |title=Core i7 950 and 975 to replace 940 and 965
 |last=Worrel
 |first=Jon
 |date=February 9, 2009
 |publisher=Fudzilla
 |url=http://www.fudzilla.com/processors/processors/processors/core-i7-950-and-975-to-replace-940-and-965
 |access-date=February 10, 2009
 }} </ref>
| 3.33&nbsp;GHz
| rowspan=7 {{yes}}
| rowspan=7 | 130&nbsp;W
| rowspan=2 | 1× QPI 6.4 GT/s
| rowspan=7 | 3× DDR3-1066
| 2009-05-31
|rowspan=2| $999
|-
| 965X
| 3.2&nbsp;GHz
| 2008-11-17
|-
| rowspan=11 | Core i7
| 960<ref>{{Citation |title=Intel to launch new Core i7 960 and Celerons |url=http://www.guru3d.com/news/intel-to-launch-new-core-i7-960-and-celerons/}}</ref>
| 3.2&nbsp;GHz
| rowspan=5 | 1× QPI 4.8 GT/s
| 2009-10-20
|rowspan=3| $562
|-
| 950<ref name="fundzilla 950 975"/>
| 3.06&nbsp;GHz
| 2009-05-31
|-
| 940
| 2.93&nbsp;GHz
| 2008-11-17
|-
| 930
| 2.8&nbsp;GHz
| 2010-02-28
| $294
|-
| 920
| 2.66&nbsp;GHz
| 2008-11-17
| $284
|-
| rowspan=9 | ''Lynnfield''
| rowspan=9 | Performance<br />Desktop
| rowspan=9 | LGA<br />1156
| 880
| 3.06&nbsp;GHz
| rowspan=9 {{yes}}
| rowspan=3 | 95&nbsp;W
| rowspan=10 | [[Engineering:Direct Media Interface|DMI]]
| rowspan=9 | 2× DDR3-1333
| rowspan=2 | 2010-05-30
| $583
|-
| 875K
| rowspan=2 | 2.93&nbsp;GHz
| $342
|-
| 870<ref>{{Citation
 |title=Intel Core i5-750
 |publisher=AnandTech |date=June 17, 2009
 |url=http://www.anandtech.com/cpuchipsets/showdoc.aspx?i=3585}}</ref>
| 2009-09-08
| $562
|-
| 870S
| 2.66&nbsp;GHz
| 82&nbsp;W
| 2010-07-19
| $351
|-
| 860
| 2.8&nbsp;GHz
| 95&nbsp;W
| 2009-09-08
| $284
|-
| 860S
| 2.53&nbsp;GHz
| 82&nbsp;W
| 2010-01-07
| $337
|-
| rowspan=3 | 4 (4)
| rowspan=3 | Core i5
| 760
| 2.8&nbsp;GHz
| 95&nbsp;W
| 2010-07-17
| $209
|-
| 750<ref>{{Citation
 |title=Intel Quietly Announces Core i5
 |publisher=Xtreview |date=June 26, 2009
 |url=http://www.anandtech.com/cpuchipsets/showdoc.aspx?i=3585}}</ref>
| 2.66&nbsp;GHz
| 95&nbsp;W
| 2009-09-08
| $196
|-
| 750S
| 2.4&nbsp;GHz
| 82&nbsp;W
| 2010-01-07
| $259
|-
| ''Jasper''
''Forest''
| Embedded<br />Desktop
| 1 (2)
| LGA<br />1366
| Celeron
| P1053
| 1.33&nbsp;GHz
| {{no}}
| 30&nbsp;W
| 3× DDR3-800
| 2&nbsp;MB
| 2010-12-02
| $160
|}
* Intel states the Gainestown processors have six memory channels. Gainestown processors have dual QPI links and have a separate set of memory registers for each link in effect, a multiplexed six-channel system.<ref>{{Citation
 |title=Intel Xeon Processor 5000 SequenceTechnical Documents
 |url=http://www.intel.com/content/www/us/en/processors/xeon/xeon-processor-5000-sequence/Xeon5000TechnicalResources.html
}}</ref><ref name="Intel Xeon Processor 5500 Series Datasheet Volume 2(PDF)">
{{Citation
 |title=Intel Xeon Processor 5500 Series Datasheet Volume 2
 |publisher=Intel
 |date=March 2009
 |url=http://www.intel.com/Assets/PDF/datasheet/321322.pdf
 |access-date=May 1, 2009
}}</ref>

===Mobile processors===
{{Main|Engineering:List of Intel Core i7 processors}}
{| class="wikitable" style="font-size: 90%" border="1"
|-
! Codename
! Market
! Cores /<br />Threads
! Socket
! colspan="2" | Processor<br />Branding & Model
! Core<br />[[Clock rate]]
! Turbo
! TDP
! [[CPU cache#Multi-level caches|L3<br />cache]]
! Interface
! Release Date
! Price for<br />1k Unit
|-
| rowspan="6" |Clarksfield
| rowspan="2" | Extreme
mobile
| rowspan="6" |4 (8)
| rowspan="6" | Socket G1
rPGA 988
| rowspan="2" | Core i7<br />Extreme
| 940XM
| 2.13&nbsp;GHz
| rowspan=6 {{yes}}
| rowspan="2" | 55&nbsp;W
| rowspan="4" | 8&nbsp;MB
| rowspan="6" |* DMI<br />* 2x DDR3-1333<br />* [[Engineering:PCI Express|PCIe]] 1 x16 / 2 x8
| 2010-06-21
| $1096
|-
| 920XM
| 2.0&nbsp;GHz
| 2009-09-23
| $1054
|-
| rowspan="4" |Quad-core
mobile
Performande
mobile
| rowspan="4" | Core i7
| 840QM
| 1.86&nbsp;GHz
| rowspan="4" | 45&nbsp;W
| 2010-06-21
| $568
|-
| 820QM
| rowspan="2" |  1.73&nbsp;GHz
| 2009-09-23
| $546
|-
| 740QM
| rowspan="2" |  6&nbsp;MB
| 2010-06-21
| $378
|-
| 720QM
| 1.6&nbsp;GHz
| 2009-09-23
| $364
|-
|}

==See also==
* [[Engineering:List of Intel CPU microarchitectures|List of Intel CPU microarchitectures]]
* [[Engineering:Tick–tock model|Tick–tock model]]

==References==
{{Reflist|30em}}

==Further reading==
{{Refbegin}}
* {{Citation
 |title=InfoWorld review: Intel's Westmere struts its stuff
 |publisher=InfoWorld
 |date=March 16, 2010
 |url=http://www.infoworld.com/d/hardware/infoworld-review-intels-westmere-struts-its-stuff-588
 }}
* {{Citation
 |title        = IDF: Intel Clarkdale Up Close and Personal
 |publisher    = X-bit Labs
 |date         = September 24, 2009
 |url          = http://www.xbitlabs.com/articles/cpu/display/clarkdale-sneakpeek.html
 |url-status   = dead
 |archive-url  = https://web.archive.org/web/20110308113714/http://www.xbitlabs.com/articles/cpu/display/clarkdale-sneakpeek.html
 |archive-date = March 8, 2011
}}
* {{Citation
 |title=Intel Core i7 Processors: Nehalem and X58 Have Arrived
 |publisher=Hot Hardware
 |date=November 3, 2008
 |url=http://hothardware.com/Articles/Intel-Core-i7-Processors-Nehalem-and-X58-Have-Arrived/
 |access-date=June 10, 2009
 |archive-date=March 6, 2009
 |archive-url=https://web.archive.org/web/20090306120625/http://hothardware.com/articles/Intel-Core-i7-Processors-Nehalem-and-X58-Have-Arrived/
 |url-status=dead
 }}
* {{Citation
 |title        = Intel Core i7 CPU & Nehalem Architecture Review
 |publisher    = hardCOREware.net
 |date         = November 3, 2008
 |url          = http://www.hardcoreware.net/reviews/review-372-1.htm
 |url-status   = dead
 |archive-url  = https://web.archive.org/web/20081106050718/http://www.hardcoreware.net/reviews/review-372-1.htm
 |archive-date = November 6, 2008
}}
* {{Citation
 |title=Intel Nehalem Core i7 Series Complete Review
 |publisher=PC Perspective
 |date=November 3, 2008
 |url=http://www.pcper.com/article.php?aid=634
 |access-date=November 3, 2008
 |archive-url=https://web.archive.org/web/20081106095543/http://www.pcper.com/article.php?aid=634
 |archive-date=November 6, 2008
 |url-status=dead
 }}
* {{Citation
 |title=Intel Nehalem Core i7 940 Review
 |publisher=Xtreview
 |date=October 1, 2008
 |url=http://xtreview.com/addcomment-id-6524-view-Intel-core-i-7-940-review.html
 }}
* {{Citation |title=Intel Showcases Dunnington, Nehalem and Larrabee Processors |publisher=HotHardware |date=March 17, 2008 |first=Dave |last=Altavilla |url=http://www.hothardware.com/Articles/Intel_Showcases_Dunnington_Nehalem_and_Larrabee_Processors/ |access-date=March 26, 2008 |archive-date=May 23, 2012 |archive-url=https://web.archive.org/web/20120523001352/http://hothardware.com/Articles/Intel_Showcases_Dunnington_Nehalem_and_Larrabee_Processors/ |url-status=dead }}
* {{Citation |title=Intel Slides and Nehalem architecture information |publisher=PC Perspective |date=March 28, 2008 |first=Ryan |last=Shrout |url=http://www.pcper.com/article.php?aid=382&type=expert |access-date=April 23, 2007 |archive-url=https://web.archive.org/web/20100514070725/http://www.pcper.com/article.php?aid=382&type=expert |archive-date=May 14, 2010 |url-status=dead }}
* {{Citation |title=Intel drops a Nehalem bomb on AMD's Fusion: integrated graphics, on-die memory controller, SMT |publisher=Ars Technica |date=March 28, 2007 |first=Jon |last=Stokes |url=https://arstechnica.com/news.ars/post/20070328-intel-aims-nehalem-at-amds-fusion-integrated-graphics-on-die-memory-controller-smt.html }}
* {{Citation |title=Nehalem: Single die, 8-cores, 731M transistors |publisher=AnandTech |date=September 18, 2007 |first=Anand |last=Lal Shimpi |url=http://www.anandtech.com/cpuchipsets/intel/showdoc.aspx?i=3101&p=2 }}
* {{Citation |title=Nehalem - Everything You Need to Know about Intel's New Architecture |publisher=AnandTech |date=November 3, 2008 |first=Anand |last=Lal Shimpi |url=http://www.anandtech.com/show/2594/1 }}
* {{cite web 
|url= http://www.realworldtech.com/page.cfm?ArticleID=RWT040208182719 
|title= Inside Nehalem: Intel's Future Processor and System 
|author= David Kanter 
|publisher= realworldtech.com 
|date= April 4, 2010 
|access-date= December 16, 2010 
}}
* {{Citation |title=IDF 2007: Intel debuts Nehalem |publisher=IT Pro |date=September 19, 2007 |first=Maggie |last=Holland |url=http://www.itpro.co.uk/news/125370/idf-2007-intel-debuts-nehalem.html |url-status=dead |archive-url=https://web.archive.org/web/20071018210416/http://www.itpro.co.uk/news/125370/idf-2007-intel-debuts-nehalem.html |archive-date=October 18, 2007 }}
* {{Citation |title=Everything we know about Nehalem |language=es |publisher=CHW.net |date=January 5, 2008 |url=http://www.chw.net/Articulos/Intel/Todo-lo-que-sabemos-de-Intel-Nehalem-200801051919.html |url-status=dead |archive-url=https://web.archive.org/web/20080705084208/http://www.chw.net/Articulos/Intel/Todo-lo-que-sabemos-de-Intel-Nehalem-200801051919.html |archive-date=July 5, 2008 }}
* {{Citation |title=What you need to know about Intel's Nehalem CPU |publisher=Ars Technica |date=April 9, 2008 |first=Jon |last=Stokes |url=https://arstechnica.com/articles/paedia/cpu/what-you-need-to-know-about-nehalem.ars }}
* {{Citation |title=Details on the Forthcoming Intel Nehalem Processor |publisher=Hardware Secrets |date=March 17, 2008 |first=Gabriel |last=Torres |url=http://www.hardwaresecrets.com/article/535 |url-status=dead |archive-url=https://web.archive.org/web/20080516232401/http://www.hardwaresecrets.com/article/535 |archive-date=May 16, 2008 }}
* {{Citation |title=The Nehalem Preview: Intel Does It Again |publisher=AnandTech |date=June 5, 2008 |first=Anand Lal |last=Shimpi |url=http://www.anandtech.com/cpuchipsets/intel/showdoc.aspx?i=3326 }}
* {{Citation |title=Nehalem – Everything You Need to Know about Intel's New Architecture |publisher=AnandTech |date=August 21, 2008 |first=Anand Lal |last=Shimpi |url=http://www.anandtech.com/cpuchipsets/intel/showdoc.aspx?i=3382 }}
* {{Citation
 |title        = First Look at Nehalem Microarchitecture
 |publisher    = X-bit Labs
 |date         = November 2, 2008
 |url          = http://www.xbitlabs.com/articles/cpu/display/nehalem-microarchitecture.html
 |url-status   = dead
 |archive-url  = https://web.archive.org/web/20081106102523/http://xbitlabs.com/articles/cpu/display/nehalem-microarchitecture.html
 |archive-date = November 6, 2008
}}
{{Refend}}

==External links==
*[http://www.intel.com/technology/architecture-silicon/next-gen/ Nehalem processor] at [[Company:Intel|Intel]].com

{{Intel processors|nehalem}}

[[Category:Intel x86 microprocessors]]
[[Category:Intel microarchitectures]]

{{Sourceattribution|Nehalem (microarchitecture)}}