View source for Instruction selection

__NOTOC__
In [[Computer science|computer science]], ''instruction selection'' is the stage of a [[Compiler|compiler]] backend that transforms its middle-level [[Intermediate representation|intermediate representation]] (IR) into a low-level IR. In a typical compiler, instruction selection precedes both [[Instruction scheduling|instruction scheduling]] and [[Register allocation|register allocation]]; hence its output IR has an infinite set of pseudo-registers (often known as ''temporaries'') and may still be – and typically is – subject to [[Peephole optimization|peephole optimization]]. Otherwise, it closely resembles the target [[Machine code|machine code]], [[Software:Bytecode|bytecode]], or [[Assembly language|assembly language]].

For example, for the following sequence of middle-level IR code
<pre>
t1 = a
t2 = b
t3 = t1 + t2
a = t3
b = t1
</pre>

a good instruction sequence for the [[X86|x86 architecture]] is

<source lang="asm">
MOV EAX, a
XCHG EAX, b
ADD a, EAX
</source>

For a comprehensive survey on instruction selection, see.
<ref name = "hjort-blindell-report">
{{cite report
 | last      = Blindell
 | first     = Gabriel S. Hjort
 | title     = Survey on Instruction Selection: An Extensive and Modern Literature Review
 | year      = 2013
 | arxiv     = 1306.4898
 | isbn      = 978-91-7501-898-0
}}</ref>
<ref name = "hjort-blindell-book">
{{cite book
 | last      = Blindell
 | first     = Gabriel S. Hjort
 | title     = Instruction Selection: Principles, Methods, & Applications
 | url       = https://www.springer.com/us/book/9783319340173
 | publisher = Springer
 | doi       = 10.1007/978-3-319-34019-7
 | year      = 2016
 | isbn      = 978-3-319-34017-3
 | s2cid     = 13390131
}}</ref>

== Macro expansion ==
The simplest approach to instruction selection is known as ''macro expansion''<ref>{{Cite journal|last=Brown|first=P.|year=1969|title=A Survey of Macro Processors|journal=Annual Review in Automatic Programming|volume=6|issue=2|pages=37–88|issn=0066-4138|doi=10.1016/0066-4138(69)90001-9}}</ref> or ''interpretative code generation''.<ref>{{Cite journal|last=Cattell|first=R. G. G.|year=1979|title=A Survey and Critique of Some Models of Code Generation|url=https://apps.dtic.mil/dtic/tr/fulltext/u2/a056027.pdf|archive-url=https://web.archive.org/web/20190523223442/https://apps.dtic.mil/dtic/tr/fulltext/u2/a056027.pdf|url-status=live|archive-date=May 23, 2019|journal=School of Computer Science, Carnegie Mellon University|type=Technical report}}</ref><ref>{{Cite journal|last1=Ganapathi|first1=M.|last2=Fischer|first2=C. N.|last3=Hennessy|first3=J. L.|year=1982|title=Retargetable Compiler Code Generation|journal=Computing Surveys|volume=14|issue=4|pages=573–592|issn=0360-0300|doi=10.1145/356893.356897|s2cid=2361347}}</ref><ref>{{Cite book|title=Code Generator Writing Systems|last=Lunell|first=H.|publisher=Linköping University|year=1983|location=Linköping, Sweden|type=Doctoral thesis}}</ref> A macro-expanding instruction selector operates by matching ''templates'' over the middle-level IR. Upon a match the corresponding ''macro'' is executed, using the matched portion of the IR as input, which emits the appropriate target instructions. Macro expansion can be done either directly on the textual representation of the middle-level IR,<ref>{{Cite journal|last1=Ammann|first1=U.|last2=Nori|first2=K. V.|last3=Jensen|first3=K.|last4=Nägeli|first4=H.|year=1974|title=The PASCAL (P) Compiler Implementation Notes|journal=Instituts für Informatik|type=Technical report}}</ref><ref>{{Cite journal|last1=Orgass|first1=R. J.|last2=Waite|first2=W. M.|year=1969|title=A Base for a Mobile Programming System|journal=Communications of the ACM|volume=12|issue=9|pages=507–510|doi=10.1145/363219.363226|s2cid=8164996|doi-access=free}}</ref> or the IR can first be transformed into a graphical representation which is then traversed depth-first.<ref>{{Cite book|title=Generating Machine Code for High-Level Programming Languages|last=Wilcox|first=T. R.|publisher=Cornell University|year=1971|location=Ithaca, New York, USA|type=Doctoral thesis}}</ref> In the latter, a template matches one or more adjacent nodes in the graph.

Unless the target machine is very simple, macro expansion in isolation typically generates inefficient code. To mitigate this limitation, compilers that apply this approach typically combine it with [[Peephole optimization|peephole optimization]] to replace combinations of simple instructions with more complex equivalents that increase performance and reduce code size. This is known as the ''Davidson-Fraser approach'' and is currently applied in [[Software:GNU Compiler Collection|GCC]].<ref>{{Cite journal|last1=Davidson|first1=J. W.|last2=Fraser|first2=C. W.|year=1984|title=Code Selection Through Object Code Optimization|journal=ACM Transactions on Programming Languages and Systems|volume=6|issue=4|pages=505–526|issn=0164-0925|doi=10.1145/1780.1783|citeseerx=10.1.1.76.3796|s2cid=10315537}}</ref>

== Graph covering ==

Another approach is to first transform the middle-level IR into a [[Graph (discrete mathematics)|graph]] and then [[Covering graph|cover the graph]] using ''patterns''. A pattern is a template that matches a portion of the graph and can be implemented with a single instruction provided by the target machine. The goal is to cover the graph such that the total cost of the selected patterns is minimized, where the cost typically represents the number of cycles it takes to execute the instruction. For tree-shaped graphs, the least-cost cover can be found in linear time using [[Dynamic programming|dynamic programming]],<ref>{{Cite journal|last1=Aho|first1=A. V.|last2=Ganapathi|first2=M.|last3=Tjiang|first3=S. W. K.|year=1989|title=Code Generation Using Tree Matching and Dynamic Programming|journal=ACM Transactions on Programming Languages and Systems|volume=11|issue=4|pages=491–516|doi=10.1145/69558.75700|citeseerx=10.1.1.456.9102|s2cid=1165995}}</ref> but for [[Directed acyclic graph|DAG]]s and full-fledged graphs the problem becomes NP-complete and thus is most often solved using either [[Greedy algorithm|greedy algorithm]]s or methods from combinatorial optimization.<ref>{{Cite book|last1=Wilson|first1=T.|last2=Grewal|first2=G.|last3=Halley|first3=B.|last4=Banerji|first4=D.|title=Proceedings of 7th International Symposium on High-Level Synthesis |chapter=An integrated approach to retargetable code generation |year=1994|pages=70–75|doi=10.1109/ISHLS.1994.302339|citeseerx=10.1.1.521.8288|isbn=978-0-8186-5785-6|s2cid=14384424}}</ref>
<ref>{{Cite book |doi=10.1145/309847.310076|citeseerx=10.1.1.331.390|isbn=978-1581331097|chapter=Constraint driven code selection for fixed-point DSPS|title=Proceedings of the 36th ACM/IEEE conference on Design automation conference - DAC '99|pages=817–822|year=1999|last1=Bashford|first1=Steven|last2=Leupers|first2=Rainer|s2cid=5513238}}</ref>
<ref>{{Cite journal|last1=Floch|first1=A.|last2=Wolinski|first2=C.|last3=Kuchcinski|first3=K.|year=2010|title=Combined Scheduling and Instruction Selection for Processors with Reconfigurable Cell Fabric|journal=Proceedings of the 21st International Conference on Application-Specific Architectures and Processors (ASAP'10)|pages=167–174}}</ref>

==References==
{{reflist}}

==External links==
* [http://markhobley.yi.org/programming/generations.html Alternative ways of supporting different generations of computer]{{Dead link|date=January 2020 |bot=InternetArchiveBot |fix-attempted=yes }}

{{Compiler optimizations}}

[[Category:Compiler optimizations]]

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