Serial binary adder: Difference between revisions
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The '''serial binary adder''' or '''bit-serial adder''' is a digital circuit that performs binary [[Binary adder|addition]] bit by bit. | The '''serial binary adder''' or '''bit-serial adder''' is a synchronous digital circuit that performs binary [[Binary adder|addition]] bit by bit.<ref>{{cite book | ||
| last = Even | |||
| first = Guy | |||
| chapter = On teaching fast adder designs: Revisiting Ladner & Fischer | |||
| title = Theoretical Computer Science: Essays in Memory of Shimon Even | |||
| pages = 313–347 | |||
| publisher = Springer Berlin Heidelberg | |||
| location = Berlin, Heidelberg | |||
| year = 2006 | |||
| url = http://ndl.ethernet.edu.et/bitstream/123456789/25745/1/20.pdf#page=323 | |||
| isbn = 978-3-540-32880-3 | |||
}}</ref> | |||
The serial full adder has three single-bit inputs for the numbers to be added and the carry in. | |||
There are two single-bit outputs for the sum and carry out. | |||
The carry-in signal is the previously calculated carry-out signal. | |||
The addition is performed by adding each bit, lowest to highest, one per clock cycle. | |||
==Serial binary addition== | ==Serial binary addition== | ||
| Line 5: | Line 20: | ||
Serial binary addition is done by a [[Engineering:Flip-flop (electronics)|flip-flop]] and a full adder. The flip-flop takes the carry-out signal on each clock cycle and provides its value as the carry-in signal on the next clock cycle. After all of the bits of the input operands have arrived, all of the bits of the sum have come out of the sum output. | Serial binary addition is done by a [[Engineering:Flip-flop (electronics)|flip-flop]] and a full adder. The flip-flop takes the carry-out signal on each clock cycle and provides its value as the carry-in signal on the next clock cycle. After all of the bits of the input operands have arrived, all of the bits of the sum have come out of the sum output. | ||
==Serial binary | ==Serial binary subtractor== | ||
The serial binary | The serial binary subtractor operates the same as the serial binary adder, except the subtracted number is converted to its [[Two's complement|two's complement]] before being added. Alternatively, the number to be subtracted is converted to its [[Ones' complement|ones' complement]], by inverting its bits, and the carry flip-flop is initialized to a 1 instead of to 0 as in addition. The ones' complement plus the 1 is the two's complement. | ||
==Example of operation== | ==Example of operation== | ||
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|0 | |0 | ||
|} | |} | ||
''*addition starts from | ''*addition starts from [[Bit numbering|LSb]]'' | ||
;Result=1110 or 14 | ;Result=1110 or 14 | ||
Latest revision as of 21:40, 14 April 2026
The serial binary adder or bit-serial adder is a synchronous digital circuit that performs binary addition bit by bit.[1]
The serial full adder has three single-bit inputs for the numbers to be added and the carry in. There are two single-bit outputs for the sum and carry out. The carry-in signal is the previously calculated carry-out signal. The addition is performed by adding each bit, lowest to highest, one per clock cycle.
Serial binary addition
Serial binary addition is done by a flip-flop and a full adder. The flip-flop takes the carry-out signal on each clock cycle and provides its value as the carry-in signal on the next clock cycle. After all of the bits of the input operands have arrived, all of the bits of the sum have come out of the sum output.
Serial binary subtractor
The serial binary subtractor operates the same as the serial binary adder, except the subtracted number is converted to its two's complement before being added. Alternatively, the number to be subtracted is converted to its ones' complement, by inverting its bits, and the carry flip-flop is initialized to a 1 instead of to 0 as in addition. The ones' complement plus the 1 is the two's complement.
Example of operation
- Decimal
- 5+9=14
- X=5, Y=9, Sum=14
- Binary
- 0101+1001=1110
- Addition of each step
| Inputs | Outputs | |||
|---|---|---|---|---|
| Cin | X | Y | Sum | Cout |
| 0 | 1 | 1 | 0 | 1 |
| 1 | 0 | 0 | 1 | 0 |
| 0 | 1 | 0 | 1 | 0 |
| 0 | 0 | 1 | 1 | 0 |
*addition starts from LSb
- Result=1110 or 14
See also
- Parallel binary adder
References
- ↑ Even, Guy (2006). "On teaching fast adder designs: Revisiting Ladner & Fischer". Theoretical Computer Science: Essays in Memory of Shimon Even. Berlin, Heidelberg: Springer Berlin Heidelberg. pp. 313–347. ISBN 978-3-540-32880-3. http://ndl.ethernet.edu.et/bitstream/123456789/25745/1/20.pdf#page=323.
Further reading
External links
- Interactive Serial Adder, Provides the visual logic of the Serial Adder circuit built with Teahlab's Simulator.
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