Synchronous Serial Port: Difference between revisions
From HandWiki
imported>OrgMain simplify |
add |
||
| Line 1: | Line 1: | ||
A '''Synchronous Serial Port''' (SSP) is a controller that supports | {{Short description|Serial port}} | ||
{{One source|date=March 2026}} | |||
A '''Synchronous Serial Port''' ('''SSP''') is a hardware controller commonly found in microcontrollers that provides support for synchronous serial communication protocols depending on the specific implementation. An SSP can operate in either master or slave mode, following a master–slave communication paradigm in which the master device provides the clock signal and coordinates data transfer across the bus. | |||
This hardware commonly supports one of are two widely used protocols [[I2C|Inter-Integrated circuit]] (I{{sup|2}}C) and the [[Serial Peripheral Interface]] (SPI).<ref>{{cite journal | |||
| last1 = Srinivas | |||
| first1 = Ananthula | |||
| last2 = Kumar | |||
| first2 = M. Kiran | |||
| last3 = Bhandari | |||
| first3 = Jugal Kishore | |||
| title = Design and Verification of Serial Peripheral Interface | |||
| journal = International Journal of Engineering Development and Research | |||
| date = December 2014 | |||
| volume = 1 | |||
| issue = 3 | |||
| pages = 130–136 | |||
| url = https://rjwave.org/IJEDR/papers/IJEDR1303026.pdf | |||
| access-date = 25 March 2026 | |||
}}</ref> | |||
==See also== | ==See also== | ||
* Serial Peripheral Interface Bus | * Serial Peripheral Interface Bus | ||
* [[I2C|Inter-Integrated circuit]] | |||
==Reference== | |||
{{reflist}} | |||
[[Category:Serial buses]] | [[Category:Serial buses]] | ||
Latest revision as of 04:15, 15 April 2026
Short description: Serial port
 | This article relies largely or entirely on a single source. (March 2026) |
A Synchronous Serial Port (SSP) is a hardware controller commonly found in microcontrollers that provides support for synchronous serial communication protocols depending on the specific implementation. An SSP can operate in either master or slave mode, following a master–slave communication paradigm in which the master device provides the clock signal and coordinates data transfer across the bus.
This hardware commonly supports one of are two widely used protocols Inter-Integrated circuit (I2C) and the Serial Peripheral Interface (SPI).[1]
See also
- Serial Peripheral Interface Bus
- Inter-Integrated circuit
Reference
- ↑ Srinivas, Ananthula; Kumar, M. Kiran; Bhandari, Jugal Kishore (December 2014). "Design and Verification of Serial Peripheral Interface". International Journal of Engineering Development and Research 1 (3): 130–136. https://rjwave.org/IJEDR/papers/IJEDR1303026.pdf. Retrieved 25 March 2026.
 |  |
