MIC-1

The MIC-1 is a processor architecture invented by Andrew S. Tanenbaum to use as a simple but complete example in his teaching book Structured Computer Organization. It consists of a very simple control unit that runs microcode from a 512-words store.

The Micro-Assembly Language (MAL) is engineered to allow simple writing of an IJVM interpreter, and the source code for such an interpreter can be found in the book.

Hardware

Data path

The data path is the core of the MIC-1. It contains 32-bit registers, buses, an ALU and a shifter.

Buses

There are 2 main buses of 32 lines (or 32 bits) each:

• B bus: connected to the output of the registers and to the input of the ALU.
• C bus: connected to the output of the shifter and to the input of the registers.

Registers

Registers are selected by 2 control lines: one to enable the B bus and the other to enable the C bus. The B bus can be enabled by just one register at a time, since the transfer of data from 2 registers at the same time, would make this data inconsistent. In contrast, the C bus can be enabled by more than 1 register at the same time; as a matter of fact, the current value present in the C bus can be written to more than 1 register without problems.

The reading and writing operations are carried out in 1 clock cycle.

The MBR register is a readonly register, and it contains 2 control lines. Since it is an 8-bit register, its output is connected to the least significant 8 bits of the B bus. It can be set to provide its output in 2 ways:

• 2's complement (MBR): all the remaining 24 bits of the B bus are set to 1, if it's a negative number, or they are set to 0, if it's a positive number (sign extension).
• Without complement (MBRU): the remaining 24 bits (of 32 total) are set to 0.

ALU

The ALU (or arithmetic logic unit) has the following input, output and control lines:

• 2 32-bit input lines: one for the B bus and one for the bus that is connected directly to the H register.
• 1 32-bit output line, which is connected directly to the shifter.
• 6 control lines aimed to select which operation to perform.
• 2 other output lines for the status flags N (negative) and Z (zero).

Shifter

The shifter contains a 32-bit input and output. The output is connected directly to the C bus. The shifter is used to perform logical and arithmetic shift operations, by simply setting respectively the control signal SLL8 (Shift Left Logical) and SRA1 (Shift Right Arithmetic).

External links

• Article about implementing an Mic-1 virtual Machine in VHDL
• mic1, an open source MIC-1 simulator, including MAL and IJVM assemblers
• emuMIC open source, free and animated MIC-1 emulator, developed by students of the University of Catania (for Windows, Mac and Linux)
• Mic1MMV, the MIC-1 simulator included in the 5th edition of "Structured Computer Organization" by Andrew S. Tanenbaum
• mic1 another open source MIC-1 simulator written by UMass Lowell students, which includes an assembler and microcode compiler