Biography:Vishwani Agrawal
Vishwani Agrawal | |
|---|---|
| Born | 7 February 1943 Allahabad, India |
| Education |
|
| Awards | 2014 James Monzel Award, IEEE North Atlantic Test Workshop 2012 Lifetime Contribution Medal, Test Technology Technical Council of the IEEE Computer Society 2006 Lifetime Achievement Award, VLSI Society of India 1998, Harry H. Goode Memorial Award IEEE Computer Society. |
| Scientific career | |
| Doctoral advisor | Y. T. Lo |
Vishwani D. Agrawal (born 7 February 1943) is the James J. Danaher Professor of Electrical and Computer Engineering at Auburn University. He has over four decades of industry and university experience, including working at Bell Labs, Murray Hill, NJ, Rutgers University, TRW and IIT, Delhi. He is well known as a cofounder and long-term mentor of the International Conference on VLSI Design held annually in India since 1985.
Education
He obtained his BE from the Indian Institute of Technology Roorkee in 1964, ME from the Indian Institute of Science, Bangalore, in 1966; and PhD degree in electrical engineering from the University of Illinois at Urbana-Champaign, in 1971.
Contributions
His research includes investigations on probabilistic aspects of testing,[1] and original contributions in combinational ATPG method for partial-scan circuits,[2] spectral testing methods, adaptive and asynchronous clock testing, hazard-free low-power design, high-speed testing methods.
International Conference on VLSI Design was founded in 1985 and it has influenced the development of electronics industry in India by bringing both top global researchers and practitioners in VLSI. India eventually became a major center of the semiconductor design industry. Intel arrived in India in 1988 and Microsoft in 1990.[3]
Career
He is a co-founder of the International Conference on VLSI Design,[4][5] and the VLSI Design and Test Symposium, held annually in India. He is the founder and Consulting Editor of the Springer's Frontiers in Electronic Testing Book Series. He is the founder and Editor-in-Chief of the Journal of Electronic Testing: Theory and Applications (since 1990),[6] and a past Editor-in-Chief of the IEEE Design & Test of Computers magazine. He has published over 350 papers, has coauthored five books and holds thirteen US patents. His book, Essentials of Electronic Testing for Digital, Memory and Mixed-Signal VLSI Circuits co-authored with M. L. Bushnell, published in 2000, is a widely used text in hardware testing.
His recent research has focused on optimizing testing in the context of varying clock frequencies and supply voltages.[7]
Awards
Awards received by him include the 2012 Lifetime Contribution Medal from the Test Technology Technical Council of the IEEE Computer Society, and the 2006 Lifetime Achievement Award of the VLSI Society of India, "in recognition of his contributions to the area of VLSI test and for founding and steering the International Conference on VLSI Design in India", 1998 Harry H. Goode Memorial Award of the IEEE Computer Society for "innovativecontributions to the field of electronic testing," 2014 James Monzel Award from the IEEE North Atlantic Test Workshop and 1993 Distinguished Alumnus Award of the University of Illinois at Urbana-Champaign, "in recognition of his outstanding contributions in design and test of VLSI systems." He was made a fellow of IEEE in 1986 and of ACM in 2002.
Students and collaborators
He has supervised or co-supervised about 40 PhD students. Some of the notable among them are K.-T. Cheng, (PhD 1988, University of California, Berkeley, co-advisor), now professor at UC Santa Barbara, and S. T. Chakradhar, (PhD 1990, Rutgers University, co-advisor) now at NEC labs, Fei Hu (PhD 2006, Auburn, advisor), now at QualComm. He served as a coadvisor for PhD students at prestigious academic institutions even when he was an employee of AT&T Bell labs.
His other collaborators include Dr. Sharad Seth of University of Nebraska-Lincoln[8] and Michael L. Bushnell of Rutgers (later with Spectral Design and Test Inc), both of whom have collaborated extensively with Vishwani Agrawal.
Personal life
He was born in Allahabad, India. He moved to the United States in 1966, however he remained a citizen of India until 2014. He lives in Auburn Alabama with his wife, Prathima Agrawal, formerly Samuel Ginn Distinguished Professor at Auburn University. Their son Vikas Agrawal, a graduate of UC Berkeley Haas School of Business, lives in San Francisco and is the founder of ExpensePath.[9] Their daughter Chitra Agrawal, a graduate of NYU Stern School of Business and former Marketing Director, is now a cookbook author[10][11] and founder of "Brooklyn Delhi",[12] producing a line of achaars.
References
- ↑ Agrawal, P.; Agrawal, V. D. (14 July 1975). "Probabilistic Analysis of Random Test Generation Method for Irredundant Combinational Logic Networks". IEEE Transactions on Computers C-24 (7): 691–695. doi:10.1109/T-C.1975.224289. https://ieeexplore.ieee.org/document/1672882/;jsessionid=gyKh2x3gBUteJ_k4QaeHhUJL7PnavJ4eh5UXTn0PdKm5x3KmwwTb!144025597.
- ↑ Cheng, K.-; Agrawal, V. D. (14 April 1990). "A partial scan method for sequential circuits with feedback". IEEE Transactions on Computers 39 (4): 544–548. doi:10.1109/12.54847. https://ieeexplore.ieee.org/document/54847/;jsessionid=PjCh2x3WWJEeMaxIgStakcchX-rZzGEqY6qqHbIJYYD6eHlk_6L_!878820695.
- ↑ Fernando, A. C. (14 February 2011). Business Environment. Pearson Education India. ISBN 9788131731581. https://books.google.com/books?id=xaHonZv5dfIC&dq=India+Development+Centre+%28IIDC%29&pg=PA62.
- ↑ "25th International VLSI Design & 11th Embedded Systems Conference to Bring Back VLSI Industry into Spotlight, Hyderabad, 27 September 2011". http://www.afaqs.com/news/company_briefs/?id=51577_%20The%2025th%20International%20conference%20on%20VLSI%20Design.
- ↑ "Technology for Safe World Highlight of Global Electronics Conference | siliconindia". https://news.siliconindia.com/technology/technology-for-safe-world-highlight-of-global-electronics-conference-nid-190803-cid-2.html.
- ↑ "Journal of Electronic Testing". https://www.springer.com/journal/10836.
- ↑ Sheshadri, V.; Agrawal, V. D.; Agrawal, P. (14 January 2013). "Optimum Test Schedule for SoC with Specified Clock Frequencies and Supply Voltages". 2013 26th International Conference on VLSI Design and 2013 12th International Conference on Embedded Systems. pp. 267–272. doi:10.1109/VLSID.2013.199. ISBN 978-1-4673-4639-9. https://ieeexplore.ieee.org/document/6472651/;jsessionid=--ah2x3ktKa-hGqYzFtNMYlPdvbrenxvhiEcCUcI6HWpYawPVqfB!878820695.
- ↑ "Spotlight On Dr. Sharad Seth". CSE Bits & Bytes. University of Nebraska-Lincoln. 18 April 2012. http://newsroom.unl.edu/announce/cse/1134/6887.
- ↑ "ExpensePath". https://www.expensepath.com/.
- ↑ "Chitra Agrawal | HuffPost". https://www.huffpost.com/author/chitra-agrawal.
- ↑ "Chitra Agrawal: From Brooklyn to Bangalore". 29 September 2015. https://lifeandthyme.com/food/profiles/chitra-agrawal-from-brooklyn-to-bangalore/.
- ↑ "Brooklyn Delhi Indian condiments". https://brooklyndelhi.com/.
External links
- Official website at Auburn
- Official websites Prathima Agrawal, ExpensePath, Brooklyn Delhi
- List of Publications and citations
- V. D. Agrawal, "Keynote Talk: A History of the VLSI Design Conference," VLSI Design (VLSID), 2012 25th International Conference on, Hyderabad, 2012, pp. 1-2.
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