Category:x86 memory management
Here is a list of articles in the category X86 memory management of the Computing portal that unifies foundations of mathematics and computations using computers.
As part of the IBM PC compatible system architecture, originally only the first 640KB of memory was available for application programs. Various schemes were used to make the rest of the first 1MB of memory and later memory beyond the 1MB boundary available to user programs. These schemes were superseded by virtual memory, demand paging operating systems that made use of 32bit addressing capabilities that were introduced in the Intel 80386 processor.
Pages in category "x86 memory management"
The following 27 pages are in this category, out of 27 total.
3
- 3 GB barrier (computing)
A
- A20 line (computing)
- Address Windowing Extensions (computing)
C
- Conventional memory (computing)
E
- Enhanced EMS (computing)
- Enhanced Expanded Memory Specification (computing)
- Expanded memory (computing)
- Expanded Memory Specification (computing)
- Extended memory (computing)
- Extended Virtual Control Program Interface (computing)
F
- Foreshadow (security vulnerability) (computing)
H
- High memory (computing)
- High memory area (computing)
I
- Intel 5-level paging (computing)
- Intel Memory Model (computing)
L
- Load value injection (computing)
M
- Meltdown (security vulnerability) (computing)
- Microarchitectural Data Sampling (computing)
P
- PCI hole (computing)
- Physical Address Extension (computing)
R
- RAM limit (computing)
S
- Socket G3 Memory Extender (computing)
- Spectre (security vulnerability) (computing)
- Speculative Store Bypass (computing)
- Supervisor Mode Access Prevention (computing)
- SWAPGS (security vulnerability) (computing)
X
- X86 memory segmentation (computing)
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