Engineering:OpenPower Microwatt

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Microwatt
General Info
Launched2019-08-29[1]
Designed byIBM, OpenPOWER Foundation
Architecture and classification
ApplicationSoft core
Instruction setPower ISA 3.0
ppc64le
Physical specifications
Cores
  • 1
History

The Microwatt is an open source soft processor core originally written by Anton Blanchard at IBM, announced at the OpenPOWER Summit NA 2019[2] and published on Github in August 2019. It adheres to the Power ISA 3.0 instruction set and can be run on FPGA boards, booting Linux, MicroPython and Zephyr.[3][4][5][6][7][8]

Implementation

The Microwatt is a tiny 64-bit little endian scalar integer processor core, implementing a subset of the Power ISA 3.0 instruction set. It has 64× 64-bit general purpose registers. It uses Wishbone for the memory interface.[4]

The initial development was done in a couple of months, included the entire integer processing functionality of the instruction set; the bare minimum to make it compliant, with no memory management unit and no floating-point unit.[4]

Later additions to the implementation includes JTAG debugger interface, divider instructions, 16 kB instruction and 32 kB data caches, and pipelining.[4]

It's designed using VHDL 2008 and the GHDL simulation environment.[3]

Chiselwatt

A sibling project called Chiselwatt is another open processor core implementing the Power ISA 3.0 instruction set, written in the Scala based Chisel instead of VHDL.[9][10]

History

It is the first processor written from scratch using the open Power ISA 3.0, and is released by the OpenPOWER Foundation as a reference design.

The project started as a demo, proof of concept and a reference implementation for the release of the opensource initiative regarding Power ISA 3.0.[11] The goal for Blanchard was to see if he could make it, and as a software developer, taking on a very low level hardware project was a challenge.[2][3]

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See also

References