Engineering:Pulse transition detector

Short description: Flip-flop logic gate

A Pulse transition detector is used in flip flops in order to achieve edge triggering in the circuit. It merely converts the clock signal's rising edge to a very narrow pulse.

The PTD consists of a delay gate (which delays the clock signal) and the clock signal itself passed through a NAND gate and then inverted.

The benefit of edge triggering is that it removes the problems of zeroes and ones catching associated with pulse triggered flipflops (e.g. master slave flip flops).