Memory rank
A memory rank is a set of DRAM chips connected to the same chip select, which are therefore accessed simultaneously. In practice all DRAM chips share all of the other command and control signals, and only the chip select pins for each rank are separate (the data pins are shared across ranks).[1]
The rank and per-chip bus width of a memory module is written in a concise string. For example, 2R×4 means that the module has two ranks of four-bit-wide chips.
Details
Predating the term rank (sometimes also called row) is the use of single-sided and double-sided modules, especially with SIMMs. While most often the number of sides used to carry RAM chips corresponded to the number of ranks, sometimes they did not. This could lead to confusion and technical issues.[2][3]
Multi-Ranked Buffered DIMM
A Multi-Ranked Buffered DIMM (MR-DIMM) allows both ranks to be accessed simultaneously by the memory controller, and is supported by AMD, Google, Microsoft, JEDEC, and Intel.[4]
Performance of multiple rank modules
There are several effects to consider regarding memory performance in multi-rank configurations:
See also
References
- ↑ "Definition of Rank". http://h17007.www1.hpe.com/docs/iss/DL380pGen8/setup_install/advanced/Content/138678.htm. Retrieved 2017-09-25.
- ↑ "An Overview of Memory". 2008-05-06. http://www.professormesser.com/free-a-plus-training/a-plus-videos/an-overview-of-memory/. Retrieved 2017-08-09.
- ↑ "Computer Memory Issues". https://de.ifixit.com/Wiki/Computer_Memory_Issues. Retrieved 2017-08-09.
- ↑ "Next-Generation CAMM, MR-DIMM Memory Modules Show up at Computex". https://www.anandtech.com/show/18893/next-generation-camm-mr-dimm-modules-at-computex.
Bibliography
- Balasubramonian, Rajeev (May 2022). Innovations in the Memory System. Springer. ISBN 9783031017636.
- Bruce, Jacob; Wang, David; Ng, Spencer (2008). Memory Systems: Cache, DRAM, Disk. Morgan Kaufmann Publishers. ISBN 978-0-12-379751-3.
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