Template:Infobox CPU/doc
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![]() | This is a documentation subpage for Template:Infobox CPU It may contain usage information, categories and other content that is not part of the original template page. |
This template is for CPUs. For generic hardware components, see Template:Infobox computer hardware. Template:Missing Information
[[File:{{{image}}}|{{{image_size}}}|alt={{{alt}}}|{{{alt}}}]] {{{caption}}} | |
General Info | |
---|---|
Launched | {{{produced-start}}} |
Discontinued | {{{produced-end}}} |
Marketed by | {{{soldby}}} |
Designed by | {{{designfirm}}} |
Common manufacturer(s) |
|
CPUID code | {{{cpuid}}} |
Product code | {{{code}}} |
Performance | |
Max. CPU clock rate | {{{slowest}}} {{{slow-unit}}} to {{{fastest}}} {{{fast-unit}}} |
FSB speeds | {{{fsb-slowest}}} {{{fsb-slow-unit}}} to {{{fsb-fastest}}} {{{fsb-fast-unit}}} |
HyperTransport speeds | {{{hypertransport-slowest}}} {{{hypertransport-slow-unit}}} to {{{hypertransport-fastest}}} {{{hypertransport-fast-unit}}} |
QPI speeds | {{{qpi-slowest}}} {{{qpi-slow-unit}}} to {{{qpi-fastest}}} {{{qpi-fast-unit}}} |
DMI speeds | {{{dmi-slowest}}} {{{dmi-slow-unit}}} to {{{dmi-fastest}}} {{{dmi-fast-unit}}} |
Data width | {{{data-width}}} |
Address width | {{{address-width}}} |
Virtual address width | {{{virtual-width}}} |
Cache | |
L1 cache | {{{l1cache}}} |
L2 cache | {{{l2cache}}} |
L3 cache | {{{l3cache}}} |
L4 cache | {{{l4cache}}} |
Last level cache | {{{llcache}}} |
Architecture and classification | |
Application | {{{application}}} |
Min. feature size | {{{size-from}}} to {{{size-to}}} |
Architecture | {{{arch1}}} |
Microarchitecture | {{{microarch}}} |
Instruction set | {{{arch}}} |
Instructions | {{{instructions}}} |
Extensions |
|
Physical specifications | |
Transistors |
|
Cores |
|
GPU(s) | {{{gpu}}} |
Co-processor | {{{co-processor}}} |
Package(s) |
|
Socket(s) |
|
Products, models, variants | |
Core name(s) |
|
Product code name(s) |
|
Model(s) |
|
Brand name(s) |
|
Variant(s) | {{{variant}}} |
History | |
Predecessor | {{{predecessor}}} |
Successor | {{{successor}}} |
{{Infobox CPU | name = | image = | image_size = | alt = | caption = <!----------------- General Info -----------------> | produced-start = | produced-end = | soldby = | designfirm = | manuf1 = <!-- manuf1..5 --> | cpuid = | code = <!----------------- Performance ------------------> | slowest = | fastest = | slow-unit = | fast-unit = | fsb-slowest = | fsb-fastest = | fsb-slow-unit = | fsb-fast-unit = | hypertransport-slowest = | hypertransport-fastest = | hypertransport-slow-unit = | hypertransport-fast-unit = | qpi-slowest = | qpi-fastest = | qpi-slow-unit = | qpi-fast-unit = | dmi-slowest = | dmi-fastest = | dmi-slow-unit = | dmi-fast-unit = | data-width = | address-width = | virtual-width = <!-------------------- Cache ---------------------> | l1cache = | l2cache = | l3cache = | l4cache = | llcache = <!------- Architecture and classification --------> | application = | size-from = | size-to = | arch1 = | microarch = | arch = | instructions = | extensions = <!----------- Physical specifications ------------> | transistors = | numcores = | gpu = | co-processor = | pack1 = <!-- pack1..9 --> | sock1 = <!-- sock1..9 --> <!--------- Products, models, variants -----------> | core1 = <!-- core1..9 --> | pcode1 = <!-- pcode1..9 --> | model1 = <!-- model1..9 --> | brand1 = <!-- brand1..9 --> | variant = <!------------------ History -------------------> | predecessor = | successor = }}
Usage
{{Infobox CPU | name = Device Name | image = An image to show in the infobox | image_size = Size of the image (defaults to 200px) | alt = Mouse over text for the image | caption = A caption for the image <!----------------- General Info -------------------------------------------------------------------------------------> | produced-start = When production began / Launch date →see talkpage section #Dates | produced-end = When production ended / Discontinued date →see talkpage section #Dates | soldby = Often, but not always, the same as the designfirm and/or manuf1 | designfirm = Often, but not always, the same as manuf1 and/or soldby | manuf1 = (1..5) Common manufacturers of the device | cpuid = CPUID or PVR value | code = numerical identifier for the CPU (product code) <!----------------- Performance --------------------------------------------------------------------------------------> | slowest = Lowest maximum CPU clock | fastest = Highest maximum CPU clock | slow-unit = Unit for slow speed. Default: GHz | fast-unit = Unit for fast speed. Default: GHz | fsb-slowest = Slowest FSB speed | fsb-fastest = Fastest FSB speed | fsb-slow-unit = Unit for slow speed. Default: MHz | fsb-fast-unit = Unit for fast speed. Default: MHz | hypertransport-slowest = Slowest HyperTransport speed | hypertransport-fastest = Fastest HyperTransport speed | hypertransport-slow-unit = Unit for slow speed. Default: GT/s | hypertransport-fast-unit = Unit for fast speed. Default: GT/s | qpi-slowest = Slowest QPI (QuickPath Interconnect) speed | qpi-fastest = Fastest QPI speed | qpi-slow-unit = Unit for slow speed. Default: GT/s | qpi-fast-unit = Unit for fast speed. Default: GT/s | dmi-slowest = Slowest DMI (Direct Media Interface) speed | dmi-fastest = Fastest DMI speed | dmi-slow-unit = Unit for slow speed. Default: GT/s | dmi-fast-unit = Unit for fast speed. Default: GT/s | data-width = Data bus width in bits | address-width = Address bus width in bits | virtual-width = Virtual address bus width in bits <!-------------------- Cache -----------------------------------------------------------------------------------------> | l1cache = Level 1 cache size | l2cache = Level 2 cache size | l3cache = Level 3 cache size | l4cache = Level 4 cache size | llcache = Last Level cache size <!------- Architecture and classification ----------------------------------------------------------------------------> | application = Typical application (Embedded, Mobile, Desktop, Server) | size-from = First fabrication size | size-to = Second fabrication size | arch1 = Architecture →see talkpage section #Architecture | microarch = Microarchitecture of the CPU | arch = Instruction set architecture (ISA) that the CPU implements →see talkpage section #Architecture | instructions = Instruction sets (or number of instructions) →see talkpage section #Architecture | extensions = Extensions to the instructions <!----------- Physical specifications --------------------------------------------------------------------------------> | transistors = Number of transistors, transistor count | numcores = Number of cores (2 for dual-core) | gpu = Integrated GPU | co-processor = A [[co-processor]](s) used together | pack1 = (1..5) Names of CPU packages | sock1 = (1..9) Names of the sockets that the CPU was made for <!--------- Products, models, variants -------------------------------------------------------------------------------> | core1 = (1..9) Names of the cores →see talkpage section "Names (Products, models, variants)" | pcode1 = (1..9) Product code names →see talkpage section "Names (Products, models, variants)" | model1 = (1..9) Model names →see talkpage section "Names (Products, models, variants)" | brand1 = (1..9) Marketing names of the CPU | variant = Variants in the same family and generation →see talkpage section "Names (Products, models, variants)" <!------------------ History ---------------------------------------------------------------------------------------> | predecessor = What CPU came before | successor = What CPU came after }}
- All fields, except
name
are optional - Following old parameters you should not use anymore:
created
→better: produced-start
,produced-end
clock
→better: slowest
,fastest
fsb
→better: fsb-slowest
,fsb-fastest
cores
,cores1
→better: numcores
socket
→better: sock1
...sock9
manuf
,core
,sock
,pack
,arch
, andmicroarch
are AutoLinks, so you can use plain text or a link for them.- The numbered attributes mean that there is allowance for multiples.
- See the talk page for some examples which show the full usage of this infobox in a few combinations.
Examples
See also