Write combining: Difference between revisions

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{{Short description|Computing technique}}
'''Write combining''' ('''WC''')<ref>{{cite web|url=http://download.intel.com/design/PentiumII/applnots/24442201.pdf|title=Write Combining Memory Implementation Guidelines|publisher=Intel|author=Intel|date=November 1998|accessdate=2010-11-02}}</ref> is a computer bus technique for allowing [[Data|data]] to be combined and temporarily stored in a buffer{{snd}} the '''write combine buffer''' ('''WCB'''){{snd}} to be released together later in [[Burst mode (computing)|burst mode]] instead of writing (immediately) as single [[Bit|bit]]s or small chunks.
'''Write combining''' ('''WC''')<ref>{{cite web|url=http://download.intel.com/design/PentiumII/applnots/24442201.pdf|title=Write Combining Memory Implementation Guidelines|publisher=Intel|author=Intel|date=November 1998|accessdate=2010-11-02}}</ref> is a computer bus technique for allowing [[Data|data]] to be combined and temporarily stored in a buffer{{snd}} the '''write combine buffer''' ('''WCB'''){{snd}} to be released together later in [[Burst mode (computing)|burst mode]] instead of writing (immediately) as single [[Bit|bit]]s or small chunks.


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Write combining cannot be used for general memory access (data or code regions) due to the [[Weak ordering|weak ordering]]. Write-combining does not guarantee that the combination of writes and reads is done in the expected order. For example, a <code>write</code>/<code>read</code>/<code>write</code> combination to a specific address would lead to the write combining order of <code>read</code>/<code>write</code>/<code>write</code> which can lead to obtaining wrong values with the first read (which potentially relies on the write before).
Write combining cannot be used for general memory access (data or code regions) due to the [[Weak ordering|weak ordering]]. Write-combining does not guarantee that the combination of writes and reads is done in the expected order. For example, a <code>write</code>/<code>read</code>/<code>write</code> combination to a specific address would lead to the write combining order of <code>read</code>/<code>write</code>/<code>write</code> which can lead to obtaining wrong values with the first read (which potentially relies on the write before).


In order to avoid the problem of read/write order described above, the [[Write buffer|write buffer]] can be treated as a fully associative [[CPU cache|cache]] and added into the [[Memory hierarchy|memory hierarchy]] of the device in which it is implemented.<ref>{{cite web|url=http://www.bearwindows.boot-land.net/af.htm|title=Video Hardware Acceleration in DOS Environment|publisher=BearWindows Vault|author=BearWindows|date=2008-09-01|accessdate=2010-11-02}}</ref>
In order to avoid the problem of read/write order described above, the [[Write buffer|write buffer]] can be treated as a fully associative [[CPU cache|cache]] and added into the [[Memory hierarchy|memory hierarchy]] of the device in which it is implemented.<ref>{{cite web|url=http://www.bearwindows.boot-land.net/af.htm|archive-url=https://web.archive.org/web/20080724002604/http://www.bearwindows.boot-land.net/af.htm|url-status=usurped|archive-date=July 24, 2008|title=Video Hardware Acceleration in DOS Environment|publisher=BearWindows Vault|author=BearWindows|date=2008-09-01|accessdate=2010-11-02}}</ref>
Adding complexity slows down the [[Memory hierarchy|memory hierarchy]] so this technique is often only used for memory which does not need strong ordering (always correct) like the frame buffers of video cards.
Adding complexity slows down the [[Memory hierarchy|memory hierarchy]] so this technique is often only used for memory which does not need strong ordering (always correct) like the frame buffers of video cards.


Latest revision as of 09:50, 23 May 2026

Short description: Computing technique

Write combining (WC)[1] is a computer bus technique for allowing data to be combined and temporarily stored in a buffer – the write combine buffer (WCB) – to be released together later in burst mode instead of writing (immediately) as single bits or small chunks.

Technique

Write combining cannot be used for general memory access (data or code regions) due to the weak ordering. Write-combining does not guarantee that the combination of writes and reads is done in the expected order. For example, a write/read/write combination to a specific address would lead to the write combining order of read/write/write which can lead to obtaining wrong values with the first read (which potentially relies on the write before).

In order to avoid the problem of read/write order described above, the write buffer can be treated as a fully associative cache and added into the memory hierarchy of the device in which it is implemented.[2] Adding complexity slows down the memory hierarchy so this technique is often only used for memory which does not need strong ordering (always correct) like the frame buffers of video cards.

See also

References

  1. ↑ Intel (November 1998). "Write Combining Memory Implementation Guidelines". Intel. http://download.intel.com/design/PentiumII/applnots/24442201.pdf. Retrieved 2010-11-02. 
  2. ↑ BearWindows (2008-09-01). "Video Hardware Acceleration in DOS Environment". BearWindows Vault. http://www.bearwindows.boot-land.net/af.htm. Retrieved 2010-11-02. 



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