Engineering:Open Pluggable Specification
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Open Pluggable Specification (OPS) is a computing module plug-in format available for adding computing capability to flat panel displays. The format was first announced by NEC, Intel, and Microsoft in 2010.[1]
Computing modules in the OPS format are available on Intel- and ARM-based CPUs, running operating systems including Microsoft Windows and Google Android.
The main benefit of using OPS in digital signage is to reduce downtime and maintenance cost by making it extremely easy to replace the computing module in case of a failure.
Technical specification
- A computing module fully enclosed in a 180mm x 119mm x 30mm box
- JAE TX25 plug connector and TX24 receptacle
- 80-pin contacts
- Supported interfaces:
- Power
- HDMI/DVI and DisplayPort
- Audio
- USB 2.0/3.0
- UART
- OPS control signals[2]
Pin definition
Pin Number | Signal | Description | I/O | Pin Number | Signal | Description | I/O |
---|---|---|---|---|---|---|---|
40 | +12V - +19V | Power | - | 80 | GND | Ground | - |
39 | +12V - +19V | Power | - | 79 | GND | Ground | - |
38 | +12V - +19V | Power | - | 78 | GND | Ground | - |
37 | +12V - +19V | Power | - | 77 | GND | Ground | - |
36 | +12V - +19V | Power | - | 76 | GND | Ground | - |
35 | +12V - +19V | Power | - | 75 | GND | Ground | - |
34 | +12V - +19V | Power | - | 74 | PWR_STATUS | PowerGood | OUT (OC) |
33 | +12V - +19V | Power | - | 73 | PS_ON# | Pluggable Signal ON | IN |
32 | GND | Ground | - | 72 | PB_DET | Pluggable Board Detect | OUT |
31 | DVI_HPD | DVI-D | IN | 71 | CEC | Consumer Electronic Control | I/O |
30 | DVI_DDC_CLK | DVI-D | I/O | 70 | AZ_LINEOUT_R | Audio-Rch | OUT |
29 | DVI_DDC_DATA | DVI-D | I/O | 69 | AZ_LINEOUT_L | Audio-Lch | OUT |
28 | GND | Ground | - | 68 | GND | Ground | - |
27 | TMDS2+ | DVI-D | OUT | 67 | USB_PP0 | USB | I/O |
26 | TMDS2- | DVI-D | OUT | 66 | USB_PN0 | USB | I/O |
25 | GND | Ground | - | 65 | GND | Ground | - |
24 | TMDS1+ | DVI-D | OUT | 64 | USB_PP1 | USB | I/O |
23 | TMDS1- | DVI-D | OUT | 63 | USB_PN1 | USB | I/O |
22 | GND | Ground | - | 62 | GND | Ground | - |
21 | TMDS0+ | DVI-D | OUT | 61 | USB_PP2 | USB | I/O |
20 | TMDS0- | DVI-D | OUT | 60 | USB_PN2 | USB | I/O |
19 | GND | Ground | - | 59 | GND | Ground | - |
18 | TMDS_CLK+ | DVI-D | OUT | 58 | StdA_SSTX+ | USB3.0 | I/O |
17 | TMDS_CLK- | DVI-D | OUT | 57 | StdA_SSTX- | USB3.0 | I/O |
16 | GND | Ground | - | 56 | GND | Ground | - |
15 | DDP_HPD | DisplayPort | IN | 55 | StdA_SSRX+ | USB3.0 | I/O |
14 | DDP_AUXP | DisplayPort | I/O | 54 | StdA_SSRX- | USB3.0 | I/O |
13 | DDP_AUXN | DisplayPort | I/O | 53 | GND | Ground | - |
12 | GND | Ground | - | 52 | UART_TXD | UART3.3V | OUT |
11 | DDP_0P | DisplayPort | OUT | 51 | UART_RXD | UART3.3V | IN |
10 | DDP_0N | DisplayPort | OUT | 50 | SYS_FAN | System Fan Control | OUT |
9 | GND | Ground | - | 49 | RSVD | Reserved pins | - |
8 | DDP_1P | DisplayPort | OUT | 48 | RSVD | Reserved pins | - |
7 | DDP_1N | DisplayPort | OUT | 47 | RSVD | Reserved pins | - |
6 | GND | Ground | - | 46 | RSVD | Reserved pins | - |
5 | DDP_2P | DisplayPort | OUT | 45 | RSVD | Reserved pins | - |
4 | DDP_2N | DisplayPort | OUT | 44 | RSVD | Reserved pins | - |
3 | GND | Ground | - | 43 | RSVD | Reserved pins | - |
2 | DDP_3P | DisplayPort | OUT | 42 | RSVD | Reserved pins | - |
1 | DDP_3N | DisplayPort | OUT | 41 | RSVD | Reserved pins | - |
Succession
The OPS format is planned to be succeeded by the Smart Display Module (SDM) format.
References
- ↑ "NEC, Intel and Microsoft Form Strategic Relationship". 10 November 2010. https://news.microsoft.com/2010/11/10/nec-intel-and-microsoft-form-strategic-relationship/.
- ↑ https://www.itu.int/dms_pub/itu-t/oth/06/5B/T065B00000B0063PDFE.pdf [bare URL PDF]
- ↑ "500 Response already committed". https://www.microdata.it/download/ops-emts-1-2-613108-324427-007-june2019.pdf.
Original source: https://en.wikipedia.org/wiki/Open Pluggable Specification.
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