Engineering:System in package
 | This article or section may contain misleading parts. (November 2007) |
A system in package (SiP) or system-in-a-package is a number of integrated circuits enclosed in one or more chip carrier packages that may be stacked using Package on package.[1] The SiP performs all or most of the functions of an electronic system, and is typically used inside a mobile phone, digital music player, etc.[2] Dies containing integrated circuits may be stacked vertically on a substrate. They are internally connected by fine wires that are bonded to the package. Alternatively, with a flip chip technology, solder bumps are used to join stacked chips together. Systems-in-package are like systems-on-chip (SoC) but less tightly integrated and not on a single semiconductor die.
SiP dies can be stacked vertically or tiled horizontally, unlike less dense multi-chip modules, which place dies horizontally on a carrier. SiP connects the dies with standard off-chip wire bonds or solder bumps, unlike slightly denser three-dimensional integrated circuits which connect stacked silicon dies with conductors running through the die.
Many different 3-D packaging techniques have been developed for stacking many fairly standard chip dies into a compact area.[3]
An example SiP can contain several chips—such as a specialized processor, DRAM, flash memory—combined with passive components—resistors and capacitors—all mounted on the same substrate. This means that a complete functional unit can be built in a multi-chip package, so that few external components need to be added to make it work. This is particularly valuable in space constrained environments like MP3 players and mobile phones as it reduces the complexity of the printed circuit board and overall design. Despite its benefits, this technique decreases the yield of fabrication since any defective chip in the package will result in a non-functional packaged integrated circuit, even if all other modules in that same package are functional.
SiP technology is primarily being driven by market trends in wearables, mobile devices and the internet of things. As the internet of things becomes more of a reality and less of a vision, there is innovation going on at the system on a chip and SiP level so that microelectromechanical (MEMS) sensors can be integrated on a separate die and control the connectivity.[4]
SiP solutions may require multiple packaging technologies, such as flip chip, wire bonding, wafer-level packaging and more.[5]
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See also
References
- ↑ "System in Packaging - nepes". http://www.nepes.co.kr/web/nepes_eng/semi_SiP.
- ↑ By Pushkar Apte, W. R. Bottoms, William Chen and George Scalise, IEEE Spectrum. “Advanced Chip Packaging Satisfies Smartphone Needs.” February 8, 2011. Retrieved July 31, 2015.
- ↑ By R. Wayne Johnson, Mark Strickland and David Gerke, NASA Electronic Parts and Packaging Program. “3-D Packaging: A Technology Review.” June 23, 2005. Retrieved July 31, 2015.
- ↑ By Ed Sperling, Semiconductor Engineering. “Why Packaging Matters.” November 19, 2015. Retrieved March 16, 2016.
- ↑ By Tech Search International and Chip Scale Review Staff, Chip Scale Review. “Major OSATs positioned for growth opportunities in SiP.” May/June Issue. Retrieved June 22, 2016.
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