Engineering:Chip carrier
In electronics, a chip carrier is one of several kinds of surface-mount technology packages for integrated circuits (commonly called "chips"). Connections are made on all four edges of a square package; compared to the internal cavity for mounting the integrated circuit, the package overall size is large.[1]
Types
Chip carriers may have either J-shaped metal leads for connections by solder or by a socket, or may be lead-less with metal pads for connections. If the leads extend beyond the package, the preferred description is "flat pack".[1] Chip carriers can be smaller than dual in-line packages and since they use all four edges of the package they can have a larger pin count. Chip carriers may be made of ceramic or plastic. Some forms of chip carrier package are standardized in dimensions and registered with trade industry associations such as JEDEC. Other forms are proprietary to one or two manufacturers. Sometimes the term "chip carrier" is used to refer generically to any package for an integrated circuit.
Types of chip-carrier package are usually referred to by initialisms and include:
- BCC: Bump chip carrier[2]
- CLCC: Ceramic leadless chip carrier[3]
- Leadless chip carrier (LLCC): Leadless chip carrier, contacts are recessed vertically.[2]
- LCC: Leaded chip carrier[2]
- LCCC: Leaded ceramic chip carrier[2]
- DLCC: Dual lead-less chip carrier (ceramic)[2]
- PLCC: Plastic leaded chip carrier[2][3]
- PoP: Package on package
Plastic-leaded chip carrier
A plastic-leaded chip carrier (PLCC) has a rectangular plastic housing. It is a reduced cost evolution of the ceramic leadless chip carrier (CLCC).
A premolded PLCC was originally released in 1976, but did not see much market adoption. Texas Instruments later released a postmolded variant that was soon adopted by most major semiconductor companies. The JEDEC trade group started a task force in 1981 to categorize PLCCs, with the MO-047 standard released in 1984 for square packages and the MO-052 standard released in 1985 for rectangular packages.[4]
The PLCC uses a "J"-lead with pin spacings of 0.05" (1.27 mm). The metal strip forming the lead is wrapped around and under the edge of the package, resembling the letter J in cross-section. Lead counts range from 20 to 84.[5] PLCC packages can be square or rectangular. Body widths range from 0.35" to 1.15". The PLCC "J" Lead configuration requires less board space versus equivalent gull leaded components, which have flat leads that extend out perpendicularly to the narrow edge of the package. The PLCC is preferred over DIP style chip carriers when lead counts exceed 40 pins due to the PLCC's more efficient use of board surface area.
The heatspreader versions are identical in form factor to the standard non-heatspreader versions. Both versions are JEDEC compliant in all respects. The heatspreader versions give the system designer greater latitude in thermally-enhanced board level and/or system design. RoHS compliant, lead-free and green material sets are now qualified standards.
A PLCC circuit may either be installed in a PLCC socket or surface-mounted. PLCC sockets may in turn be surface mounted, or use through-hole technology. The motivation for a surface-mount PLCC socket would be when working with devices that cannot withstand the heat involved during the reflow process, or to allow for component replacement without reworking. Using a PLCC socket may be necessary in situations where the device requires stand-alone programming, such as some flash memory devices. Some through-hole sockets are designed for prototyping with wire wrapping.
A specialized tool called a PLCC extractor facilitates the removal of a PLCC from a socket.
PLCCs continue to be used for a wide variety of device types, which would include memory, processors, controllers, ASICs, DSPs, etc. It is particularly common for read-only memories, as it provides an easily swappable socketed chip. Applications range from consumer products through automotive and aerospace.
Leadless
A leadless chip carrier (LCC) has no "leads", but instead has rounded pins through the edges of the ceramic or molded plastic package.
Prototypes and devices intended for extended temperature environments are typically packaged in ceramic, while high-volume products for consumer and commercial markets are typically packaged in plastic.
See also
References
- ↑ 1.0 1.1 Kenneth Jackson, Wolfgang Schroter, (ed), Handbook of Semiconductor Technology Volume 2,Wiley VCH, 2000, ISBN:3-527-29835-5,page 627
- ↑ 2.0 2.1 2.2 2.3 2.4 2.5 "Integrated Circuit, IC Package Types; SOIC. Surface Mount Device Package". Interfacebus.com. http://www.interfacebus.com/Design_Pack_Type_SOIC.html.
- ↑ 3.0 3.1 "CPU Collection Museum - Chip Package Information". CPU Shack. http://www.cpushack.net/Packages.html.
- ↑ Prasad, Ray (1997). Surface mount technology: principles and practice. p. 121. ISBN 0-412-12921-3.
- ↑ Minges, Merrill L. (1989). Electronic Materials Handbook. CRC Publishing. p. 173. ISBN 0-87170-285-1.
- ↑ http://www.cpu-world.com/CPUs/80286/Intel-R80286-8.html "Intel R80286-8; Package 68-pin ceramic LCC"
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