Interoperable PDK Libraries
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Interoperable PDK Libraries (IPL) is an industry alliance established in April 2007 to collaborate on the creation and promotion of interoperable Process Design Kit (PDK) standards. Since its inception, the IPL Alliance has released a proof-of-concept interoperable PCell library, demonstrated interoperability among tools from multiple vendors, and expanded its charter to address broader interoperability issues with foundry Process Design Kit (PDKs) and design flows.
Benefits
- Enables a single PCell library and PDK to support any OpenAccess tool
- Reduces PCell and PDK development and support costs
- Creates choices in building analog design flows
IPL was founded by Applied Wave Research (AWR), Ciranova, Silicon Navigator, Springsoft and Synopsys[1] in order to provide an open, interoperable, next generation way of doing PDKs for analog and mixed signal design. Previously, PDK's were developed in proprietary languages, like Cadence's SKILL or Mentor's AMPL, for proprietary use with a single companies' tool suite.
The broader alliance has developed an OpenAccess testing ecosystem.[2] The ecosystem includes tools and test cases from the participating vendors. The validation is done by loading a PCell library and PDK into this ecosystem and exercising the various design tools. As a final check, the PCell-loaded test cases are streamed out to GDSII and design rule checked with Mentor Calibre nmDRC. In addition, each vendor has individually tested the IPL mechanism with their own tools.
References
- ↑ Santarini, Michael (26 October 2007). "Upstart analog EDA PCell coalition IPL makes progress | EDN". archive.vn. http://www.edn.com/electronics-blogs/other/4307573/Upstart-analog-EDA-PCell-coalition-IPL-makes-progress.
- ↑ Morse, Rich (April 2012). "Interoperable Design Constraints for Custom IC Design". IEEE Design & Test of Computers 29 (2): 53–61. doi:10.1109/MDT.2012.2182983. https://ieeexplore.ieee.org/document/6123194. Retrieved 20 February 2021.
External links
- IPL website [1]
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