Engineering:Epitaxial wafer

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An epitaxial wafer[1] (also called epi wafer,[2] epi-wafer,[3] or epiwafer[4]) is a wafer of semiconducting material made by epitaxial growth (epitaxy) for use in photonics, microelectronics, spintronics, or photovoltaics. The epi layer may be the same material as the substrate, typically monocrystaline silicon, or it may be a silicon dioxide (SoI) or a more exotic material with specific desirable qualities. The purpose of epitaxy is to perfect the crystal structure over the bare substrate below and improve the wafer surface's electrical characteristics, making it suitable for highly complex microprocessors and memory devices.[5]

History

Silicon epi wafers were first developed around 1966 and achieved commercial acceptance by the early 1980s.[6] Methods for growing the epitaxial layer on monocrystalline silicon or other wafers include: various types of chemical vapor deposition (CVD) classified as Atmospheric pressure CVD (APCVD) or metal organic chemical vapor deposition (MOCVD), as well as molecular beam epitaxy (MBE).[7] Two "kerfless" methods (without abrasive sawing) for separating the epitaxial layer from the substrate are called "implant-cleave" and "stress liftoff". A method applicable when the epi-layer and substrate are the same material employs ion implantation to deposit a thin layer of crystal impurity atoms and resulting mechanical stress at the precise depth of the intended epi layer thickness. The induced localized stress provides a controlled path for crack propagation in the following cleavage step.[8] In the dry stress lift-off process applicable when the epi-layer and substrate are suitably different materials, a controlled crack is driven by a temperature change at the epi/wafer interface purely by the thermal stresses due to the mismatch in thermal expansion between the epi layer and substrate, without the necessity for any external mechanical force or tool to aid crack propagation. It was reported that this process yields single atomic plane cleavage, reducing the need for post-lift-off polishing and allowing multiple substrate reuses up to 10 times.[9]

Types

The epitaxial layers may consist of compounds with particular desirable features such as gallium nitride (GaN), gallium arsenide (GaAs), or some combination of the elements gallium, indium, aluminum, nitrogen, phosphorus or arsenic.[10]

Photovoltaic research and development

Solar cells, or photovoltaic cells (PV) for producing electric power from sunlight can be grown as thick epi wafers on a monocrystalline silicon "seed" wafer by chemical vapor deposition (CVD), and then detached as self-supporting wafers of some standard thickness (e.g., 250 μm) that can be manipulated by hand, and directly substituted for wafer cells cut from monocrystalline silicon ingots. Solar cells with this technique can have efficiencies approaching wafer-cut cells but at appreciably lower costs if the CVD can be done at atmospheric pressure in a high-throughput inline process. In September 2015, the Fraunhofer Institute for Solar Energy Systems (Fraunhofer ISE) announced the achievement of efficiency above 20% for such cells. Optimizing the production chain was done in collaboration with NexWafe GmbH, a company spun off from Fraunhofer ISE to commercialize production.[11][12] The surface of epitaxial wafers may be textured to enhance light absorption.[13][14] In April 2016, the company Crystal Solar of Santa Clara, California, in collaboration with the European research institute IMEC announced that they achieved a 22.5% cell efficiency of an epitaxial silicon cell with an nPERT (n-type passivated emitter, rear totally-diffused) structure grown on 6-inch (150 mm) wafers.[15] In September 2015 Hanwha Q Cells presented an achieved conversion efficiency of 21.4% (independently confirmed) for screen-printed solar cells made with Crystal Solar epitaxial wafers.[16]

In June 2015, it was reported that heterojunction solar cells grown epitaxially on n-type monocrystalline silicon wafers had reached an efficiency of 22.5% over a total cell area of 243.4 cm[math]\displaystyle{ ^2 }[/math].[17]

In 2016, a new approach was described for producing hybrid photovoltaic wafers combining the high efficiency of III-V multi-junction solar cells with the economies and wealth of experience associated with silicon. The technical complications involved in growing the III-V material on silicon at the required high temperatures, a subject of study for some 30 years, are avoided by epitaxial growth of silicon on GaAs at low temperature by Plasma-enhanced chemical vapor deposition (PECVD)[18]

References

Notes

  1. ↑ Swinger, pp. 20, 21, 40, 47.
  2. ↑ Claeys, Cor L. (2006). High Purity Silicon 9, Issue 4. The Electrochemical Society. p. 162. ISBN 9781566775045. https://books.google.com/books?id=LdNJWQUaydkC&q=%22epi+wafer%22&pg=PA162. 
  3. ↑ Hua, Y. N. Identification of Silicon Crystalline Defects on Epi-Wafer in Wafer Fabrication. Chartered Semiconductor Mfg. Ltd., 2001.
  4. ↑ Szweda, R. Diode Laser Materials & Devices – A Worldwide Market & Technology Overview to 2005. Elsevier, 2001. p. x.
  5. ↑ "Epitaxy | ASM" (in en-US). https://www.asm.com/epitaxy. 
  6. ↑ Swinger, pp. 20–22.
  7. ↑ III-V Integrated Circuit Fabrication Technology: Fabrication, Integration and Applications. CRC Press. 2016. pp. 97–136. ISBN 9789814669313. 
  8. ↑ Henley, Francois J., "Method of cleaving a thin sapphire layer from a bulk material by implanting a plurality of particles and performing a controlled cleaving process", US patent 9336989, published 10 May 2016
  9. ↑ Farah, John; Nicholson, John; Thirunavukkarasu, Sekar; Wasmer, Kilian (2014). "Dry-epitaxial lift-off for high efficiency solar cells". 2014 IEEE 40th Photovoltaic Specialist Conference (PVSC). pp. 1796–1801. doi:10.1109/PVSC.2014.6925271. ISBN 978-1-4799-4398-2. 
  10. ↑ III-V Integrated Circuit Fabrication Technology: Fabrication, Integration and Applications. CRC Press. 2016. ISBN 9789814669313. 
  11. ↑ Janz, Stefan; Reber, Stefan (14 September 2015). "20% Efficient Solar Cell on EpiWafer". Fraunhofer ISE. https://www.ise.fraunhofer.de/en/press-and-media/press-releases/press-releases-2015/nexwafe. 
  12. ↑ Drießen, Marion; Amiri, Diana; Milenkovic, Nena; Steinhauser, Bernd; Lindekugel, Stefan; Benick, Jan; Reber, Stefan; Janz, Stefan (2016). "Solar Cells with 20% Efficiency and Lifetime Evaluation of Epitaxial Wafers". Energy Procedia 92: 785–790. doi:10.1016/j.egypro.2016.07.069. ISSN 1876-6102. 
  13. ↑ Gaucher, Alexandre; Cattoni, Andrea; Dupuis, Christophe; Chen, Wanghua; Cariou, Romain; Foldyna, Martin; Lalouat, Loı̈c; Drouard, Emmanuel et al. (2016). "Ultrathin Epitaxial Silicon Solar Cells with Inverted Nanopyramid Arrays for Efficient Light Trapping". Nano Letters 16 (9): 5358–5364. doi:10.1021/acs.nanolett.6b01240. PMID 27525513. Bibcode: 2016NanoL..16.5358G. https://hal-polytechnique.archives-ouvertes.fr/hal-01401081/file/Gaucher2016.pdf. 
  14. ↑ Chen, Wanghua; Cariou, Romain; Foldyna, Martin; Depauw, Valerie; Trompoukis, Christos; Drouard, Emmanuel; Lalouat, Loic; Harouri, Abdelmounaim et al. (2016). "Nanophotonics-based low-temperature PECVD epitaxial crystalline silicon solar cells". Journal of Physics D: Applied Physics 49 (12): 125603. doi:10.1088/0022-3727/49/12/125603. ISSN 0022-3727. Bibcode: 2016JPhD...49l5603C. 
  15. ↑ Prophet, Graham (18 April 2016). "Cheaper solar cells through kerfless wafers". EE Times (Europe) (European Business Press SA). http://www.electronics-eetimes.com/news/cheaper-solar-cells-through-kerfless-wafers-0. 
  16. ↑ V. Mertens, S. Bordihn, A. Mohr, K. Petter, J. W. Müller, D. J. W. Jeong, R. Hao, T. S. Ravi, "21.4% Efficient Fully Screen Printed n-Type Solar Cell on Epitaxially Grown Silicon Wafers With Built-In Boron Rear Side Emitter", in Proc. 31st EUPVSEC, Hamburg, Germany 2015, pp. 1000–1002.
  17. ↑ Kobayashi, Eiji; Watabe, Yoshimi; Hao, Ruiying; Ravi, T. S. (2015). "High efficiency heterojunction solar cells on n-type kerfless monocrystalline silicon wafers by epitaxial growth". Applied Physics Letters 106 (22): 223504. doi:10.1063/1.4922196. ISSN 0003-6951. Bibcode: 2015ApPhL.106v3504K. 
  18. ↑ Cariou, Romain; Chen, Wanghua; Maurice, Jean-Luc; Yu, Jingwen; Patriarche, Gilles; Mauguin, Olivia; Largeau, Ludovic; Decobert, Jean et al. (2016). "Low temperature plasma enhanced CVD epitaxial growth of silicon on GaAs: a new paradigm for III-V/Si integration". Scientific Reports 6: 25674. doi:10.1038/srep25674. ISSN 2045-2322. PMID 27166163. Bibcode: 2016NatSR...625674C. 



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