Engineering:Intel Hub Architecture

From HandWiki

Intel Hub Architecture (IHA), also known as Accelerated Hub Architecture (AHA) was Intel's architecture for the 8xx family of chipsets,[1][2] starting in 1999 with the Intel 810. It uses a memory controller hub (MCH) that is connected to an I/O controller hub (ICH) via a 266 MB/s bus. The MCH chip supports memory and AGP (replaced by PCI Express in 9xx series chipsets), while the ICH chip provides connectivity for PCI (revision 2.2 before ICH5 series and revision 2.3 since ICH5 series), USB (version 1.1 before ICH4 series and version 2.0 since ICH4 series), sound (originally AC'97, Azalia added in ICH6 series), IDE hard disks (supplemented by Serial ATA since ICH5 series, fully replaced IDE since ICH8 series for desktops and ICH9 series for notebooks) and LAN (uncommonly activated on desktop motherboards and notebooks, usually independent LAN controller were placed instead of PHY chip).[citation needed]

Intel claimed that, because of the high-speed channel between the sections, the IHA was faster than the earlier northbridge/southbridge design,[3] which hooked all low-speed ports to the PCI bus. The IHA also optimized data transfer based on data type.[citation needed]

Next generation

Intel Hub Interface 2.0 was employed in Intel's line of E7xxx server chipsets. This new revision allowed for dedicated data paths for transferring greater than 1.0 GB/s of data to and from the MCH, which support I/O segments with greater reliability and faster access to high-speed networks.

Current status

IHA is now considered obsolete and no longer used, being superseded by the Direct Media Interface architecture. The Platform Controller Hub (PCH) providing most of the features previously seen in ICH chips while moving memory, graphics and PCI Express controllers to the CPU, introduced with the Intel 5 Series chipsets in 2009. This chipset architecture is still used in desktops, in some notebooks it is going to be replaced by SoC processor designs.

References

External links