Engineering:S-100 bus

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Short description: Early computer bus
S-100 bus
Cromemco Blitz Bus.jpg
Year created1974; 50 years ago (1974)
Created byEd Roberts
Width in bits8

The S-100 bus or Altair bus, IEEE 696-1983 (withdrawn), is an early computer bus designed in 1974 as a part of the Altair 8800. The S-100 bus was the first industry standard expansion bus for the microcomputer industry. S-100 computers, consisting of processor and peripheral cards, were produced by a number of manufacturers. The S-100 bus formed the basis for homebrew computers whose builders (e.g., the Homebrew Computer Club) implemented drivers for CP/M and MP/M. These S-100 microcomputers ran the gamut from hobbyist toy to small business workstation and were common in early home computers until the advent of the IBM PC.

Harry Garland and Roger Melen, co-founders of Cromemco, holding an S-100 backplane (1981)

Architecture

The S-100 bus is a passive backplane of 100-pin printed circuit board edge connectors wired in parallel. Circuit cards measuring 5 in × 10 in (13 cm × 25 cm) serving the functions of CPU, memory, or I/O interface plugged into these connectors. The bus signal definitions closely follow those of an 8080 microprocessor system, since the Intel 8080 microprocessor was the first microprocessor hosted on the S-100 bus. The 100 lines of the S-100 bus can be grouped into four types: 1) Power, 2) Data, 3) Address, and 4) Clock and control.[1]

Power supplied on the bus is bulk unregulated +8 Volt DC and ±16 Volt DC, designed to be regulated on the cards to +5 V (used by TTL ICs), -5 V and +12 V for Intel 8080 CPU IC, ±12 V RS-232 line driver ICs, +12 V for disk drive motors. The onboard voltage regulation is typically performed by devices of the 78xx family (for example, a 7805 device to produce +5 volts). These are linear regulators which are commonly mounted on heat sinks.

The bi-directional 8-bit data bus of the Intel 8080 is split into two unidirectional 8-bit data buses. The processor could use only one of these at a time. The Sol-20 used a variation that had only a single 8-bit bus and used the now-unused pins as signal grounds to reduce electronic noise. The direction of the bus, in or out, was signaled using the otherwise unused DBIN pin. This became universal in the S-100 market as well, making the second bus superfluous. Later, these two 8-bit buses would be combined to support a 16-bit data width for more advanced processors, using the Sol's system to signal the direction.

The address bus is 16-bits wide in the initial implementation and later extended to 24-bits wide. A bus control signal can put these lines in a tri-state condition to allow direct memory access. The Cromemco Dazzler, for example, is an early S-100 card that retrieved digital images from memory using direct memory access.

Clock and control signals are used to manage the traffic on the bus. For example, the DO Disable line will tristate the address lines during direct memory access. Unassigned lines of the original bus specification were later assigned to support more advanced processors. For example, the Zilog Z-80 processor has a non-maskable interrupt line that the Intel 8080 processor does not. One unassigned line of the S-100 bus then was reassigned to support the non-maskable interrupt request.

History

The Cromemco XXU processor board, introduced in 1986. At 16.7 MHz, it is the fastest CPU ever developed for the S-100 bus. It uses a Motorola 68020 processor with 68881 co-processor and 16 Kbytes of high-speed cache memory. This CPU is used in the Cromemco CS-250 computer, widely deployed by the U.S. Air Force.

During the design of the Altair, the hardware required to make a usable machine was not available in time for the January 1975 launch date. The designer, Ed Roberts, also had the problem of the backplane taking up too much room. Attempting to avoid these problems, he placed the existing components in a case with additional "slots", so that the missing components could be plugged in later when they became available. The backplane is split into four separate cards, with the CPU on a fifth. He then looked for an inexpensive source of connectors, and he came across a supply of military surplus 100-pin edge connectors. The 100-pin bus was created by an anonymous draftsman, who selected the connector from a parts catalog and arbitrarily assigned signal names to groups of connector pins.[2]

A burgeoning industry of "clone" machines followed the introduction of the Altair in 1975. Most of these used the same bus layout as the Altair, creating a new industry standard. These companies were forced to refer to the system as the "Altair bus", and wanted another name in order to avoid referring to their competitor when describing their own system. The "S-100" name, short for "Standard 100", was coined by Harry Garland and Roger Melen, co-founders of Cromemco.[3][4] While on a flight to attend the Atlantic City PC '76 microcomputer conference in August 1976, they shared the cabin with Bob Marsh and Lee Felsenstein of Processor Technology. Melen went over to them to convince them to adopt the same name. He had a beer in his hand and when the plane hit a bump, Melen spilt some of the beer on Marsh. Marsh agreed to use the name, which Melen ascribes to him wanting to get Melen to leave with his beer.[5]

The term first appeared in print in a Cromemco advertisement in the November 1976 issue of Byte magazine.[6] The first symposium on the S-100 bus, moderated by Jim Warren, was held November 20, 1976 at Diablo Valley College with a panel consisting of Harry Garland, George Morrow, and Lee Felsenstein.[7] Just one year later, the S-100 Bus would be described as "the most used busing standard ever developed in the computer industry."[8]

Cromemco was the largest of the S-100 manufacturers, followed by Vector Graphic and North Star Computers.[9] Other innovators were companies such as Alpha Microsystems, IMS Associates, Inc., Godbout Electronics (later CompuPro), and Ithaca InterSystems. In May 1984, Microsystems published a comprehensive S-100 product directory listing over 500 "S-100/IEEE-696" products from over 150 companies.[10]

The S-100 bus signals were simple to create using an 8080 CPU, but increasingly less so when using other processors like the 68000. More board space was occupied by signal conversion logic. Nonetheless by 1984, eleven different processors were hosted on the S-100 bus, from the 8-bit Intel 8080 to the 16-bit Zilog Z-8000.[10] In 1986, Cromemco introduced the XXU card, designed by Ed Lupin, utilizing a 32-bit Motorola 68020 processor.[11]

IEEE-696 Standard

As the S-100 bus gained momentum, there was a need to develop a formal specification of the bus to help assure compatibility of products produced by different manufacturers. There was also a need to extend the bus so that it could support processors more capable than the Intel 8080 used in the original Altair Computer. In May 1978, George Morrow and Howard Fullmer published a “Proposed Standard for the S-100 Bus” noting that 150 vendors were already supplying products for the S-100 Bus. This proposed standard documented the 8-bit data path and 16-bit address path of the bus and stated that consideration was being given to extending the data path to 16 bits and the address path to 24 bits.[12]

In July 1979 Kells Elmquist, Howard Fullmer, David Gustavson, and George Morrow published a "Standard Specification for S-100 Bus Interface Devices."[13] In this specification the data path was extended to 16 bits and the address path was extended to 24 bits. The IEEE 696 Working Group, chaired by Mark Garetz, continued to develop the specification which was proposed as an IEEE Standard and approved by the IEEE Computer Society on June 10, 1982.[14]

The American National Standards Institute (ANSI) approved the IEEE standard on September 8, 1983. The computer bus structure developed by Ed Roberts for the Altair 8800 computer had been extended, rigorously documented, and now designated as the American National Standard IEEE Std 696–1983.[14]

Retirement

Racks of Cromemco S-100 Systems at the Chicago Mercantile Exchange in 1984

IBM introduced the IBM Personal Computer in 1981 and followed it with increasingly capable models: the XT in 1983 and the AT in 1984. The success of these computers, which used IBM's own, incompatible bus architecture, cut deeply into the market for S-100 bus products. In May 1984, Sol Libes (who had been a member of the IEEE-696 Working Group) wrote in Microsystems: "there is no doubt that the S-100 market can now be considered a mature industry with only moderate growth potential, compared to the IBM PC-compatible market".[15]

As the IBM PC products captured the low-end of the market, S-100 machines moved up-scale to more powerful OEM and multiuser systems. Banks of S-100 bus computers were used, for example, to process the trades at the Chicago Mercantile Exchange; the United States Air Force deployed S-100 bus machines for their mission planning systems.[16][17] However throughout the 1980s the market for S-100 bus machines for the hobbyist, for personal use, and even for small business was on the decline.[18]

The market for S-100 bus products continued to contract through the early 1990s, as IBM-compatible computers became more capable. In 1992, the Chicago Mercantile Exchange, for example, replaced their S-100 bus computers with the IBM model PS/2.[19] By 1994 the S-100 bus industry had contracted sufficiently that the IEEE did not see a need to continue supporting the IEEE-696 standard. The IEEE-696 standard was retired on June 14, 1994.[14]

References

  1. ↑ Garland, Harry (1979). Introduction to Microprocessor System Design. New York: McGraw-Hill. pp. 159–169. ISBN 0-07-022871-X. https://archive.org/details/introductiontomi00garl/page/159. "Although many other processors have been adapted to the S-100 bus, the bus signal definitions closely follow those of an 8080 system." 
  2. ↑ Libes, Sol (February 18, 1980). "The S-100 Bus: Past, Present, and Future". InfoWorld 2 (1): 7,18. https://books.google.com/books?id=aj4EAAAAMBAJ&pg=PT54. 
  3. ↑ Freiberger, Paul; Swaine, Michael (2000). Fire in the Valley: The Making of the Personal Computer (Second ed.). McGraw-Hill. p. 66. ISBN 0-07-135892-7. https://archive.org/details/fireinvalleymaki00frei. 
  4. ↑ "The Cromemco Story". I/O News 1 (1): 10. September–October 1980. https://archive.org/stream/IoNewsVolume1Number1/CromemcoIoNews11Sep-oct1980#page/n9/mode/2up. Retrieved 2013-02-22. 
  5. ↑ Swaine, Michael; Freiberger, Paul (2014-10-20). Fire in the Valley: The Birth and Death of the Personal Computer. ISBN 9781680503524. https://books.google.com/books?id=-g5QDwAAQBAJ&q=processor+technology#q=beer. 
  6. ↑ Herbert Johnson, "Origins of S-100 computers", 15 March 2008
  7. ↑ Robert Reiling (December 10, 1976). "Random Data". Homebrew Computer Club Newsletter 2 (11–12): 1. http://www.digibarn.com/collections/newsletters/homebrew/V2_11-12/Homebrew_CC_Dec76_Page_01.jpg. 
  8. ↑ Zaks, Rodnay (1977). Microprocessors - From Chips to Systems. Sybex. p. 302. 
  9. ↑ Libes, Sol (September–October 1981). "The leaders in the S-100 marketplace are Cromemco ($50M), Vector Graphics ($30M) and North Star ($25M)". Microsystems 2 (5): 8. 
  10. ↑ 10.0 10.1 Libes, Sol (May 1984). "S-100 Product Directory". Microsystems 5 (5): 59–78. 
  11. ↑ "New XXU Processor Offers Enormous Speed Advantage". I/O News 5 (4): 1,9. August–September 1986. ISSN 0274-9998. https://archive.org/details/IoNewsVolume5Number4/mode/1up. 
  12. ↑ Morrow, George; Fullmer, Howard (May 1978). "Proposed Standard for the S-100 Bus". Computer (IEEE Computer Society) 11 (5): 84–90. doi:10.1109/c-m.1978.218190. http://www.computer.org/csdl/mags/co/1978/05/01646965.pdf. "Extending the S-100 bus to 24 address bits and 16 data bits was recommended by Dave Gustavson. Exactly how this will be done is presently under consideration.". 
  13. ↑ Elmquist, Kells A.; Fullmer, Howard; Gustavson, David B.; Morrow, George (July 1979). "Standard Specification for S-100 Bus Interface Devices". Computer (IEEE Computer Society) 12 (7): 28–52. doi:10.1109/mc.1979.1658813. http://www.computer.org/csdl/mags/co/1979/07/01658813.pdf. 
  14. ↑ 14.0 14.1 14.2 An American National Standard: IEEE 696 Standard Interface Devices. doi:10.1109/IEEESTD.1983.81971. ISBN 978-0-7381-4244-9. 
  15. ↑ Libes, Sol (May 1984). "S-100 Product Directory". Microsystems 5 (5): 59. "However there is no doubt that the S-100 market can now be considered a mature industry with only moderate growth potential, compared to the IBM PC-compatible market.". 
  16. ↑ Breeding, Gary (January–February 1984). "Cromemco Systems Network Transactions at Chaotic Exchange". I/O News 3 (6): 20. ISSN 0274-9998. https://archive.org/details/io-news-volume-3-number-6/mode/2up. 
  17. ↑ "USAF will equip its tactical fighter squadrons with a mission planning system". Aviation Week & Space Technology 126 (22): 105. June 1, 1987. 
  18. ↑ Libes, Sol (May 1984). "S-100 Product Directory". Microsystems 5 (5): 59. "Whereas the early growth of the S-100 marketplace relied mainly on hobbyists and early personal computer users, the industry is now concentrating on OEM multiuser systems, and applications requiring more computer power.". 
  19. ↑ "CME Taps Datacode To Distribute Quotation Data To Floor Traders". WatersTechnology. January 27, 1992. https://www.waterstechnology.com/data-management/1628751/cme-taps-datacode-to-distribute-quotation-data-to-floor-traders. 

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