Company:SiFive

From HandWiki
Short description: Fabless semiconductor company providing RISC-V processors
SiFive, Inc.
TypePrivate
IndustrySemiconductors[1]
Founded2015; 9 years ago (2015)[1]
Founders
HeadquartersSan Mateo, California, U.S.[1]
Key people
Patrick Little (CEO)[2]
Websitewww.sifive.com

SiFive, Inc. is a fabless semiconductor company and provider of commercial RISC-V processor IP and silicon chips based on the RISC-V instruction set architecture (ISA).[3] SiFive's products include cores, SoCs, IPs, and development boards.[4]

SiFive is one of the first companies to produce a chip that implements the RISC-V ISA.[5]

History

SiFive was founded in 2015 by Krste Asanović, Yunsup Lee, and Andrew Waterman, three researchers from the University of California Berkeley.[3][4] On November 29, 2016, SiFive released the Freedom Everywhere 310 SoC and the HiFive development board,[4] making SiFive the first company to produce a chip that implements the RISC-V ISA, although universities have produced earlier RISC-V processors.[4][6]

In August 2017, SiFive hired Naveed Sherwani as CEO.[7] In October, SiFive did a limited release of its U54-MC, reportedly the world's first RISC-V based 64-bit quad-core CPU to support fully featured operating systems like Linux.[8][9]

In June 2018, SiFive acquired Open-Silicon for an undisclosed amount and retained their design capabilities for specialized chips, also called application-specific integrated circuits, or ASICs.

In February 2018, SiFive released the HiFive Unleashed, a development board containing a 64-bit SoC with four U54 cores.[10][11]

In September 2020, the company announced Patrick Little as the new CEO.[2]

In October 2020, SiFive released the HiFive Unmatched, a Mini-ITX development board with four U74-MC cores, one S7 core, 8GB DDR4 RAM, four USB 3.2 Gen1 ports, one PCI Express x16 slot, one PCIe Gen3 x4, one microSD card slot, and a Gigabit Ethernet.[12] In April 2021, the company also taped out its first system-on-chip on TSMC's N5 process technology, making it the first RISC-V-based device to be made using a 5 nm node.[13]

In June 2021,[14] Canonical announced its Ubuntu operating system supports the HiFive Unmatched and HiFive Unleashed, and the Barcelona Supercomputing Center collaborated with Codeplay Software and SiFive to implement support for the RISC-V V-extension v0.10 in the LLVM compilation infrastructure, providing vector computation capabilities through C/C++ intrinsics.[15]

Growth

In April 2018, SiFive received $50.6 million Series C funding,[16] including a major amount from Intel Capital.

In June 2019, SiFive received $65.4 million in a Series D funding round[17] led by existing investors Sutter Hill Ventures, Chengwei Capital, Spark Capital, Osage University Partners and Huami, alongside new investor Qualcomm Ventures. This brought the total investment in SiFive to $125 million.

On October 23, 2019, at the Linley Fall Processor Conference, SiFive announced the release of SiFive Shield, a platform security architecture. In December 2019, the company announced the SiFive Apex cores for mission-critical markets and SiFive Intelligence cores for vector processing workloads. Later that month, Samsung also announced it will be using SiFive RISC-V cores for SoCs, automotive, and 5G applications.[18]

In January 2020, SiFive hired Chris Lattner, an American software engineer best known as the main author of LLVM and related projects such as the Clang compiler and the Swift programming language. He joined SiFive as Senior Vice President of Platform Engineering after two years at Google.[19]

In August 2020, SiFive received $60 million in a Series E funding round[20] led by investors SK Hynix and Saudi Aramco. This brought the total investment in SiFive to $186 million. That same month, SiFive announced the creation of the OpenFive business unit to focus on the creation of processor-agnostic custom SoC design.[21]

Chip company Tenstorrent, headed by former top AMD engineers, including CTO Jim Keller, licensed SiFive's Intelligence X280 processor cores in October 2020 into its homegrown AI training and inference chips.[22] Renesas Electronics also announced partnering with SiFive to design chips for vehicles.[23]

In June 2021, SiFive launched a new processor family with two core designs: P270, a Linux-capable CPU; and P550, the highest-performing RISC-V CPU.[24][25] At the same time, Intel's Foundry Service adopted P550 for use in its Horse Creek platform, a RISC-V development platform built on Intel's newest 7 nm process node,[26] Intel 4.[27] The announcement furthered speculation of a potential acquisition of SiFive by Intel, which reportedly offered to acquire SiFive for $2 billion.[28]

As part of SiFive's “relentless innovation” program, the company announced SiFive 21G2 update for the SiFive Essential family including 11% faster U74 cores.[29]

In March 2022, SiFive received $175 million in a Series F funding round led by Coatue Management, valuing the company at over $2.5 billion. This brought the total investment in SiFive to over $350 million.[30]

In October 2023, SiFive laid off approximately 20% (~140) of its employees. SiFive reiterated their commitment to existing products and lines.[31]

Products

  • RISC-V Cores: SiFive Core Series – The SiFive Core IPs consists of three distinct families spanning from high-performance application processors to area-optimized, low-power embedded 64- and 32-bit microcontrollers, to vector processors. All SiFive processors are based upon the RISC-V ISA.
    • The SiFive Performance processor family are designed for higher throughput and performance.
    • The SiFive Intelligence family leverages a software approach to processor design to address the future requirements of deploying machine learning technology to accelerate AI/ML applications.
    • The SiFive Essential family of processor cores spans from high-performance multi-core heterogeneous application processors to area-optimized, low-power embedded microcontrollers. SiFive Essential standard core microarchitectures are based on the RISC-V ISA to provide 64-bit and 32-bit options and can be configured using SiFive Core Designer to create custom configurations.
  • SoC IP – The SoC IP is customizable, or customers choose from Memory Interface IP, Connectivity IP, or System and Peripheral IP.
  • Custom SoC – Starting with an SoC template, users can create custom SoC designs to be optimized for power, performance, and area.
  • Boards and Software – SiFive also produces the FE310 microcontroller, HiFive1, HiFive Unleashed, and other development boards and software.

DesignShare platform

DesignShare is an open source platform for building prototypes. SiFive partners with vendors to provide IP to customers designing custom chip prototypes without paying IP fees in advance. Once chip designs are ready for mass production, customers pay for the IP. DesignShare partners include Brite Semiconductor, Rambus, Chipus Microelectronics, and more.

References

  1. ↑ 1.0 1.1 1.2 "SiFive, Inc.: Private Company Information". https://www.bloomberg.com/research/stocks/private/snapshot.asp?privcapId=321806453. Retrieved 17 March 2017. 
  2. ↑ 2.0 2.1 "SiFive hires Qualcomm exec as CEO for RISC-V alternatives to Nvidia-Arm" (in en-US). 2020-09-17. https://venturebeat.com/2020/09/17/sifive-hires-qualcomm-exec-as-ceo-for-risc-v-alternatives-to-nvidia-arm/. 
  3. ↑ 3.0 3.1 Shilov, Anton (2016-07-18). "SiFive Unveils Freedom Platforms for RISC-V-Based Semi-Custom Chips". AnandTech. http://www.anandtech.com/show/10488/sifive-unveils-freedom-platforms-for-riscvbased-semicustom-chips. 
  4. ↑ 4.0 4.1 4.2 4.3 Takahashi, Dean (2017-11-29). "SiFive launches open source RISC-V custom chip". https://venturebeat.com/2016/11/29/sifive-launches-open-source-risc-v-custom-chip/. 
  5. ↑ "Companies Pushing Open Source RISC-V Silicon Out to the Edge" (in en). 2019-05-24. https://www.datacenterknowledge.com/hardware/companies-pushing-open-source-risc-v-silicon-out-edge. 
  6. ↑ McLellan, Paul (2015-05-21). "RISC-V Available in Silicon" (in en). https://community.cadence.com/cadence_blogs_8/b/breakfast-bytes/archive/2016/12/05/risc-v-sifive. 
  7. ↑ "Custom processor maker SiFive appoints Intel veteran as CEO | VentureBeat" (in en-US). 2017-08-15. https://venturebeat.com/2017/08/15/custom-processor-maker-sifive-appoints-intel-veteran-as-ceo/. 
  8. ↑ Verma, Adarsh (2017-10-09). "Linux Gets Its First Multi-Core, RISC-V Based Open Source Processor" (in en-US). Fossbytes. https://fossbytes.com/u54-mc-coreplex-ip-linux-open-source-risc-v-processor/. 
  9. ↑ Farrell, Nick. "2018 will be the year of the RISC V Linux processors" (in en-gb). http://www.fudzilla.com/news/processors/44667-2018-will-be-the-year-of-the-risc-v-linux-processors. 
  10. ↑ "SiFive Introduces RISC-V Linux-Capable Multicore Processor" (in en-US). Hackaday. 2018-02-04. https://hackaday.com/2018/02/03/sifive-introduces-risc-v-linux-capable-multicore-processor/. 
  11. ↑ "SiFive Introduces HiFive Unleashed RISC-V Linux Development Board (Crowdfunding)". 4 February 2018. https://www.cnx-software.com/2018/02/04/sifive-introduces-hifive-unleashed-risc-v-linux-development-board-crowdfunding/. 
  12. ↑ "SiFive Is Launching The Most Compelling RISC-V Development Board Yet - Phoronix". https://www.phoronix.com/scan.php?page=article&item=sifive-riscv-unmatched&num=1. 
  13. ↑ April 2021, Anton Shilov 13 (2021-04-13). "SiFive Tapes Out First 5nm TSMC RISC-V Chip With 7.2 Gbps HBM3" (in en). https://www.tomshardware.com/news/openfive-tapes-out-5nm-risc-v-soc. 
  14. ↑ June 2021, Nathaniel Mott 24 (2021-06-24). "Canonical Gives RISC-V a HiFive" (in en). https://www.tomshardware.com/news/canonical-ubuntu-risc-v. 
  15. ↑ "BSC, Codeplay and SiFive help accelerate applications on RISC-V thanks to V-extension support in LLVM" (in en). https://www.bsc.es/news/bsc-news/bsc-codeplay-and-sifive-help-accelerate-applications-risc-v-thanks-v-extension-support-llvm. 
  16. ↑ "SiFive raises $50.6 million for licensable custom microprocessors" (in en-US). 2018-04-02. https://venturebeat.com/2018/04/02/sifive-raises-50-6-million-for-licensable-custom-microprocessors/. 
  17. ↑ "9 Bay Area startups raised over $300 million at week's end - Silicon Valley Business Journal". https://www.bizjournals.com/sanjose/news/2019/06/07/the-funded-9-bay-area-startups-raised-over-300m-at.html. 
  18. ↑ Shilov, Anton. "Samsung to Use SiFive RISC-V Cores for SoCs, Automotive, 5G Applications". https://www.anandtech.com/show/15228/samsung-to-use-riscv-cores. 
  19. ↑ Chan, Rosalie. "The star Apple engineer behind its Swift programming language just left Google and went to a new job at hot AI startup SiFive". https://www.businessinsider.com/chris-lattner-former-apple-google-engineer-swift-ai-startup-sifive-2020-2. 
  20. ↑ Nellis, Stephen (2020-08-11). "Arm rival SiFive raises $60 million from SK Hynix, Aramco" (in en). Reuters. https://www.reuters.com/article/us-sifive-tech-idUSKCN2571UL. 
  21. ↑ "SiFive Launches OpenFive As Custom Silicon Business Unit For RISC-V, ARM, Other ISAs - Phoronix". https://www.phoronix.com/scan.php?page=news_item&px=SiFive-OpenFive. 
  22. ↑ Williams, Chris. "What links AMD CPU guru Jim Keller, an AI chip upstart, and SiFive? This vector-crunching 64-bit RISC-V processor" (in en). https://www.theregister.com/2021/04/22/tenstorrent_sifive_intelligence_x280_licensed/. 
  23. ↑ "SiFive Intelligence platform tapped by Tenstorrent and Renesas". 2021-04-22. https://linuxgizmos.com/sifive-intelligence-platform-tapped-by-tenstorrent-and-renesas/. 
  24. ↑ Salter, Jim (2021-06-22). "SiFive's brand-new P550 is one of the world's fastest RISC-V CPUs" (in en-us). https://arstechnica.com/gadgets/2021/06/sifives-brand-new-p550-is-one-of-the-worlds-fastest-risc-v-cpus/. 
  25. ↑ "SiFive aims to challenge Arm with new tech, pairs with Intel on effort" (in en). 2021-06-22. https://www.reuters.com/technology/sifive-aims-challenge-arm-with-new-tech-pairs-with-intel-effort-2021-06-22/. 
  26. ↑ Cutress, Dr Ian. "Intel to Create RISC-V Development Platform with SiFive P550 Cores on 7nm in 2022". https://www.anandtech.com/show/16780/intel-to-create-riscv-development-platform-with-sifive-p550-cores-on-7nm-in-2022. 
  27. ↑ Cutress, Dr Ian. "Intel's Process Roadmap to 2025: with 4nm, 3nm, 20A and 18A?!". https://www.anandtech.com/show/16823/intel-accelerated-offensive-process-roadmap-updates-to-10nm-7nm-4nm-3nm-20a-18a-packaging-foundry-emib-foveros. 
  28. ↑ "Chipmaker SiFive Is Said to Draw Intel Takeover Interest" (in en). Bloomberg.com. 2021-06-10. https://www.bloomberg.com/news/articles/2021-06-10/chipmaker-sifive-is-said-to-draw-intel-takeover-interest. 
  29. ↑ "SiFive speeds up RISC-V U74 cores as Canaan unveils a 3-TOPS Kendryte K510". 2021-07-30. https://linuxgizmos.com/sifive-speeds-up-risc-v-u74-cores-as-canaan-unveils-a-3-tops-kendryte-k510/. 
  30. ↑ "SiFive Leadership in RISC-V Powers $2.5B+ Company Valuation". 16 March 2022. https://www.businesswire.com/news/home/20220316005396/en/SiFive-Leadership-in-RISC-V-Powers-2.5B-Company-Valuation. 
  31. ↑ Cutress, Ian (2023-10-24). "The Risk of Risc-V: What's Going On (Updated)" (in en). https://morethanmoore.substack.com/p/the-risk-of-risc-v-whats-going-on. 



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