Engineering:Sunway (processor)

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Short description: Series of computer microprocessors developed by Jiāngnán Computing Lab

Sunway, or Shenwei, (Chinese: 神威), is a series of computer microprocessors, developed by Jiangnan Computing Lab (江南计算技术研究所) in Wuxi, China .[1] It uses a reduced instruction set computer (RISC) architecture, but details are still sparse.

History

The Sunway series microprocessors were developed mainly for the use of the military of the People's Republic of China . It is expressed on online forums that the original microarchitecture is believed to be inspired by the DEC Alpha.[2][better source needed] The SW-3 is thought especially to be based on the Alpha 21164.[3]

Jack Dongarra states about the follow-on SW26010, the "Shenwei-64 Instruction Set (this is NOT related to the DEC Alpha instruction set)", and doesn't say it's a new instruction set from the three prior generations he names;[4][5] although precise details of the instruction set are unknown.

Sunway SW-1

  • First generation, 2006
  • Single-core
  • 900 MHz

Sunway SW-2

  • Second generation, 2008
  • Dual-core
  • 1400 MHz
  • SMIC 130 nm process
  • 70–100 W

Sunway SW-3, SW1600

  • Third generation, 2010
  • 16-core, 64-bit RISC[6]
  • 975–1200 MHz[6]
  • 65 nm process
  • 140.8 GFLOPS @ 1.1 GHz
  • Max memory capacity: 16 GB
  • Peak memory bandwidth: 68 GB/s
  • Quad-channel 128-bit DDR3
  • Four-issue superscalar
  • Two integer and two floating-point execution units
  • 7-stage integer pipeline and 10-stage floating-point pipeline
  • 43-bit virtual address and 40-bit physical address
  • Up to 8 TB virtual memory and 1 TB of physical memory supported
  • L1 cache: 8 KB instruction cache and 8 KB data cache[6]
  • L2 cache: 96 KB[6]
  • 128-bit system bus

Sunway SW26010

  • Fourth generation, 2016
  • 64-bit RISC processor
  • Manycore architecture, with 4 CPU clusters on a chip, each comprising 64 lightweight compute CPUs with an additional management CPU, linked by a network-on-a-chip[7]

See also

References