Hardware-based encryption
 The IBM 4758 Cryptographic Module | |
| Process type | Cryptography |
|---|---|
| Industrial sector(s) | Computing |
| Main technologies or sub-processes | Cryptographic hash function, Encryption |
Hardware-based encryption is the use of computer hardware to assist software, or sometimes replace software, in the process of data encryption. Typically, this is implemented as part of the processor's instruction set. For example, the AES encryption algorithm (a modern cipher) can be implemented using the AES instruction set on the ubiquitous x86 architecture.[1] Such instructions also exist on the ARM architecture.[2] However, more unusual systems exist where the cryptography module is separate from the central processor, instead being implemented as a coprocessor, in particular a secure cryptoprocessor or cryptographic accelerator, of which an example is the IBM 4758, or its successor, the IBM 4764.[3] Hardware implementations can be faster and less prone to exploitation than traditional software implementations, and furthermore can be protected against tampering.[4]
History
Prior to the use of computer hardware, cryptography could be performed through various mechanical or electro-mechanical means. An early example is the Scytale used by the Spartans.[5] The Enigma machine was an electro-mechanical system cipher machine notably used by the Germans in World War II.[citation needed] After World War II, purely electronic systems were developed. In 1987 the ABYSS (A Basic Yorktown Security System) project was initiated.[6][7] The aim of this project was to protect against software piracy. However, the application of computers to cryptography in general dates back to the 1940s and Bletchley Park, where the Colossus computer was used to break the encryption used by German High Command during World War II. The use of computers to encrypt, however, came later. In particular, until the development of the integrated circuit, of which the first was produced in 1960, computers were impractical for encryption, since, in comparison to the portable form factor of the Enigma machine,[8] computers of the era took the space of an entire building. It was only with the development of the microcomputer that computer encryption became feasible, outside of niche applications. The development of the World Wide Web lead to the need for consumers to have access to encryption, as online shopping became prevalent.[9] The key concerns for consumers were security and speed.[9] This led to the eventual inclusion of the key algorithms into processors as a way of both increasing speed and security.[4]
Implementations
In the instruction set
x86
The X86 architecture, as a CISC (Complex Instruction Set Computer) Architecture, typically implements complex algorithms in hardware.[10] Cryptographic algorithms are no exception. The x86 architecture implements significant components of the AES (Advanced Encryption Standard) algorithm,[1] which can be used by the NSA for Top Secret information.[11] The architecture also includes support for the SHA Hashing Algorithms through the Intel SHA extensions.[1] Whereas AES is a cipher, which is useful for encrypting documents, hashing is used for verification, such as of passwords (see PBKDF2).
ARM
ARM processors can optionally support Security Extensions. Although ARM is a RISC (Reduced Instruction Set Computer) architecture, there are several optional extensions specified by ARM Holdings.[2][12]
As a coprocessor
- IBM 4758 – The predecessor to the IBM 4764.[13] This includes its own specialised processor, memory and a Random Number Generator.[14]
- IBM 4764 and IBM 4765, identical except for the connection used.[13] The former uses PCI-X, while the latter uses PCI-e.[3] Both are peripheral devices that plug into the motherboard.
Proliferation
Advanced Micro Devices (AMD) processors are also x86 devices, and have supported the AES instructions since the 2011 Bulldozer processor iteration.[15] Due to the existence of encryption instructions on modern processors provided by both Intel and AMD, the instructions are present on most modern computers.[16] They also exist on many tablets and smartphones due to their implementation in ARM processors.[16]
Advantages
Implementing cryptography in hardware means that part of the processor is dedicated to the task. This can lead to a large increase in speed.[4] In particular, modern processor architectures that support pipelining can often perform other instructions concurrently with the execution of the encryption instruction. Furthermore, hardware can have methods of protecting data from software. Consequently, even if the operating system is compromised, the data may still be secure (see Software Guard Extensions).[17]
Disadvantages
If, however, the hardware implementation is compromised, major issues arise. Malicious software can retrieve the data from the (supposedly) secure hardware – a large class of method used is the timing attack.[18] This is far more problematic to solve than a software bug, even within the operating system. Microsoft regularly deals with security issues through Windows Update. Similarly, regular security updates are released for Mac OS X and Linux, as well as mobile operating systems like iOS, Android, and Windows Phone. However, hardware is a different issue. Sometimes, the issue will be fixable through updates to the processor's microcode (a low level type of software). However, other issues may only be resolvable through replacing the hardware, or a workaround in the operating system which mitigates the performance benefit of the hardware implementation, such as in the Spectre exploit.[19]
See also
References
- ↑ 1.0 1.1 1.2 Intel® 64 and IA-32 Architectures Software Developer's Manual. Intel. December 2017. pp. 303–309, 410. https://software.intel.com/sites/default/files/managed/39/c5/325462-sdm-vol-1-2abcd-3abcd.pdf.
- ↑ 2.0 2.1 ARM® Cortex®-A57 MPCore Processor Cryptography Extension. ARM Holdings. 17 December 2017. http://infocenter.arm.com/help/topic/com.arm.doc.ddi0514g/DDI0514G_cortex_a57_mpcore_cryptography_trm.pdf.
- ↑ 3.0 3.1 "4764 Cryptographic Coprocessor". IBM. https://www.ibm.com/support/knowledgecenter/ssw_ibm_i_61/rzajc/rzajcco4758.htm.
- ↑ 4.0 4.1 4.2 P. Schmid and A. Roos (2010). "AES-NI Performance Analyzed". Tom's Hardware. http://www.tomshardware.com/reviews/clarkdale-aes-ni-encryption,2538.html.
- ↑ Kelly, Thomas (July 1998). "The Myth of the Skytale". Cryptologia 22 (3): 244–260. doi:10.1080/0161-119891886902.
- ↑ "ABYSS: A Trusted Architecture for Software Protection". https://www.computer.org/csdl/proceedings/sp/1987/0771/00/07710038.pdf.
- ↑ "Building the IBM 4758 Secure Coprocessor". IBM. http://www.research.ibm.com/people/s/sailer/publications/2001/ibm4758.pdf.
- ↑ "Enigma-E case". Crypto Museum. http://www.cryptomuseum.com/kits/enigma/support/files/case.pdf.
- ↑ 9.0 9.1 "Consumers and their online shopping expectations – Ecommerce News". 20 February 2015. http://ecommercenews.eu/consumers-online-shopping-expectations/.
- ↑ "x86-64 Instruction Set". University of Oxford. 18 April 2017. pp. 1. https://www.cs.ox.ac.uk/teaching/materials17-18/ca/lecture03.pdf.
- ↑ Lynn Hathaway (June 2003). "National Policy on the Use of the Advanced Encryption Standard (AES) to Protect National Security Systems and National Security Information". http://csrc.nist.gov/groups/ST/toolkit/documents/aes/CNSS15FS.pdf.
- ↑ "Cryptographic Hardware Accelerators". OpenWRT.org. 17 May 2016. http://wiki.openwrt.org/doc/hardware/cryptographic.hardware.accelerators.
- ↑ 13.0 13.1 "IBM 4765 Cryptographic Coprocessor Security Module". National Institute of Standards and Technology. 10 December 2012. https://csrc.nist.gov/csrc/media/projects/cryptographic-module-validation-program/documents/security-policies/140sp1505.pdf.
- ↑ "IBM 4758 Models 2 and 23 PCI Cryptographic Coprocessor". IBM. May 2004. ftp://www6.software.ibm.com/software/cryptocards/G221-9091-04.pdf.
- ↑ Brent Hollingsworth (AMD) (October 2012). "New "Bulldozer" and "Piledriver" Instructions". Arecibo Observatory. https://www.naic.edu/~phil/software/amd/New-Bulldozer-and-Piledriver-Instructions-1.pdf.
- ↑ 16.0 16.1 Shay Gueron (University of Haifa & Intel) and Nicky Mouha (KU Leuven & NIST) (9 November 2016). "Simpira v2: A Family of Efficient Permutations Using the AES Round Function". https://eprint.iacr.org/2016/122.pdf.
- ↑ "Intel SGX for Dummies (Intel SGX Design Objectives)". intel.com. 2013-09-26. https://software.intel.com/en-us/blogs/2013/09/26/protecting-application-secrets-with-intel-sgx.
- ↑ "BearSSL – Constant-Time Crypto". https://www.bearssl.org/constanttime.html.
- ↑ "Microsoft tests show Spectre patches drag down performance on older PCs". PC World. January 9, 2018. https://www.pcworld.com/article/3245742/components-processors/microsoft-tests-show-spectre-patches-drag-down-performance-on-older-pcs.html.
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