Engineering:Gen-Z

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Gen-Z
Logo of the Gen-Z Consortium
Year created2016
Created byGen-Z Consortium
Websitegenzconsortium.org

The Gen-Z consortium is a trade group of technology vendors involved in designing CPUs, random access memory, servers, storage, and accelerators. The goal was an open and royalty-free "memory-semantic" protocol, which is not limited by the memory controller of a CPU. The basic operations consist of simple loads and stores with the addition of modular extensions. It is intended to be used in a switched fabric or point-to-point where each device connects using a standard connector.[1]

The consortium was publicly announced on October 11, 2016[2] with broad industry participation. Some of the vendors also joined a group to promote the cache coherent interconnect for accelerators (CCIX) protocol on the same day.[3]

At about the same time, yet another consortium formed to work on an open specification for the Coherent Accelerator Processor Interface (CAPI).[4] The efforts followed years of delays before products were available with version 4.0 of PCI Express.[5]

On April 2, 2020, the Compute Express Link (CXL) and Gen-Z Consortiums have announced their execution of a Memorandum of Understanding (MOU), describing a mutual plan for collaboration between the two organisations .[6][7]

Membership

Server vendor members

Server vendor members include Cisco Systems, Cray, Dell Technologies, Hewlett Packard Enterprise, Huawei, IBM, and Lenovo.

CPU vendor members

CPU vendor members include Advanced Micro Devices, ARM Holdings, Broadcom Limited, IBM, and Marvell.

Memory and storage vendor members

Memory and storage vendor members include Micron Technology, Samsung, Seagate Technology, SK Hynix, and Western Digital.

Other members

Other members include IDT Corporation, IntelliProp,[8] Mellanox Technologies, Microsemi, Red Hat, and Xilinx.[1]

Conspicuous absence

Analysts noted the absence of Intel, which announced an inter-connect technology of its own called Omni-Path a year before, and Nvidia, with its own NVLink technology.[9]

References

  1. ↑ 1.0 1.1 "Gen-Z Consortium". Group's web site. http://genzconsortium.org. 
  2. ↑ Agam Shah (October 11, 2016). "Hardware makers unite to challenge Intel with Gen-Z spec". CIO from IDG. http://www.cio.com/article/3130273/hardware-makers-unite-to-challenge-intel-with-gen-z-spec.html. 
  3. ↑ Jeff Defilippi (October 11, 2016). "How do AMBA, CCIX and GenZ address the needs of the data center?". ARM Community blog. https://community.arm.com/processors/b/blog/posts/how-do-amba-ccix-and-genz-address-the-needs-of-the-data-center. 
  4. ↑ Chris Mellor (October 14, 2016). "Why OpenCAPI is a declaration of interconnect fabric war: Any standard but Intel in another CPU-memory interconnect consortium". The Register. https://www.theregister.co.uk/2016/10/14/opencapi_declaration_of_interconect_war/. 
  5. ↑ Evan Koblentz (February 3, 2017). "New PCI Express 4.0 delay may empower next-gen alternatives". Tech Republic. http://www.techrepublic.com/article/new-pci-express-4-0-delay-may-empower-next-gen-alternatives/. 
  6. ↑ Compute Express Link(CXL) Consortium and Gen-Z Consortium (April 2, 2020). "CXL Consortium and Gen-Z Consortium Announce MOU Agreement". https://b373eaf2-67af-4a29-b28c-3aae9e644f30.filesusr.com/ugd/0c1418_efb1cff3f41d486ea85d50ec638ea715.pdf. 
  7. ↑ Gen-Z Consortium (April 2, 2020). "CXL Consortium and Gen-Z Consortium Announce MOU Agreement". https://genzconsortium.org/cxl-consortium-and-gen-z-consortium-announce-mou-agreement/. 
  8. ↑ "Gen-Z Technology". http://intelliprop.com/hardware-storage-design/technology/technology-gen-z.htm. 
  9. ↑ Tallis, Billy (13 February 2018). "Gen-Z Core Specification 1.0 Published". Anandtech. https://www.anandtech.com/show/12431/genz-interconnect-core-specification-10-published. Retrieved 21 February 2018. 

External links




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