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Template:Intel processor roadmap
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Revision as of 17:24, 24 June 2023 by
Jworkorg
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Intel CPU core roadmaps from
P6
to
Tiger Lake
Template:Cleanup section
Atom (ULV)
Feature size
x86
Microarchi.
Step
Microarchi.
Step
600 nm
P6
Pentium Pro
(133 MHz)
500 nm
Pentium Pro
(150 MHz)
350 nm
Pentium Pro
(166–200 MHz)
Klamath
250 nm
Deschutes
Katmai
NetBurst
180 nm
Coppermine
Willamette
130 nm
Tualatin
Northwood
Banias
NetBurst(HT)
NetBurst(
×2
)
90 nm
Dothan
Prescott
⇨
Prescott‑2M
⇨
Smithfield
Tejas
→
⇩
→
Cedarmill (Tejas)
65 nm
Yonah
Nehalem (NetBurst)
Cedar Mill
⇨
Presler
Core
Merom
(
x86-64
)
DDR2
+
DDR3
, 4 cores on mainstream desktop
Bonnell
Bonnell
45 nm
Penryn
Nehalem
Nehalem
HT
reintroduced, integrated
MC
,
PCH
,
L3-cache introduced, 256KiB L2-cache/core,
DDR3
Saltwell
32 nm
Westmere
GPU
on same package in 45nm,
AES-NI
introduced
Sandy Bridge
Sandy Bridge
on-die ring bus, GPU on
die
, no more non-
UEFI
motherboards,
DDR3
Silvermont
Silvermont
22 nm
Ivy Bridge
Haswell
Haswell
FIVR
,
DDR3
+
DDR3L
Airmont
14 nm
Broadwell
Skylake
Skylake
DDR3L
+
DDR4
Goldmont
Goldmont
Kaby Lake
Coffee Lake
DDR4
, 6 cores on mainstream desktop
Amber Lake
Goldmont Plus
Whiskey Lake
Coffee Lake Refresh
8 cores on mainstream desktop
Comet Lake
10 cores on mainstream desktop
Rocket Lake
Tremont
Tremont
10 nm
Cannon Lake
Hybrid
Sunny Cove
Ice Lake
512KiB L2-cache/core
Lakefield
Gracemont
Willow Cove
Tiger Lake
X
e
graphics engine
Golden Cove
?
Strike-through
indicates cancelled processors
Bold names
are the microarchitecture names
Italic names
are future processors
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