Category:Computer architecture

A

• Advanced RISC Computing (21 P)

C

• Capability systems (26 P)
• Central processing unit (3 C, 87 P)
• Classes of computers (18 C, 96 P)
• Computer arithmetic (4 C, 173 P)

D

• Distributed computing architecture (12 C, 101 P)
• Distributed stream processing (9 P)

F

• Fault-tolerant computer systems (5 C, 73 P)

I

• Instruction processing (3 C, 72 P)
• Instruction set architectures (5 C, 66 P)
• Interoperability (2 C, 63 P)
• Interrupts (35 P)

N

• Network architecture (9 C, 173 P)

O

• Operating system kernels (4 C, 34 P)
• Operating systems (20 C, 27 P)

S

• Computer data storage (14 C, 46 P)

• Computer architecture

A

• Abstraction layer
• Address space
• Addressing mode
• Aperture (computer memory)
• Approximate computing
• Arithmetic logic unit
• Autonomous decentralized system

B

• Bare machine computing
• Berkeley IRAM project
• Branch Queue
• Bridging model
• Byte addressing

C

• Cache (computing)
• Cache control instruction
• Cache hierarchy
• Cache pollution
• Software:Capability Hardware Enhanced RISC Instructions
• Cellular architecture
• Comparison of CPU microarchitectures
• Comparison of instruction set architectures
• Computational RAM
• Computer architecture simulator
• Computer data storage

D

• Engineering:Data memory-dependent prefetcher
• Dataflow
• Dataflow architecture
• Directory-based coherence
• Domain-specific architecture
• DOPIPE
• Dual pipelining
• Duncan's Taxonomy
• Duncan's taxonomy

E

• Electron E1
• Empathy Map

F

• Fault-tolerant computer system
• Feng's classification
• Frequency scaling

H

• Hardware architect
• Hardware-assisted garbage collection
• Harvard architecture
• Hybrid-core computing

I

• Instruction prefetch
• Instruction window

L

• Load–store architecture
• Load–store unit

M

• Machine Check Architecture
• Manycore processor
• Memory dependence prediction
• Memory disambiguation
• Memory hierarchy
• Memory management
• Memory ordering
• Microarchitecture simulation
• Modified Harvard architecture
• Multi-core processor

N

• Network Centric Product Support
• NonStop (server computers)
• Northbound interface

O

• Open architecture

P

• Popek and Goldberg virtualization requirements
• Processor register

R

• Random-access memory
• Register file
• Register memory architecture
• Register renaming
• Register–memory architecture
• Responsiveness

S

• Scalability
• Scale cube
• Sierpiński graph
• Simple-As-Possible
• Simple-As-Possible computer
• Simultaneous multithreading
• Single instruction, multiple threads
• Single-core
• Slot (computer architecture)
• Software:Software lockout
• Spatial architecture
• Stream processing
• Superscalar processor
• Synchronous Data Flow

T

• Tagged architecture
• Temporal multithreading
• The Myth of the Harvard Architecture
• Transport triggered architecture

U

• Unix architecture

V

• Vectored interrupt
• Software:Vkernel
• Von Neumann architecture

W

• Whitewater Interactive System Development with Object Models

X

• Xputer

Z

• Zero address arithmetic