Engineering:BiCMOS
Bipolar CMOS (BiCMOS) is a semiconductor technology that integrates two semiconductor technologies, those of the bipolar junction transistor and the CMOS (complementary metal–oxide–semiconductor) logic gate, into a single integrated circuit.[1][2] In more recent times the bipolar processes have been extended to include high mobility devices using silicon–germanium junctions.
Bipolar transistors offer high speed, high gain, and low output impedance with relatively high power consumption per device, which are excellent properties for high-frequency analog amplifiers including low noise radio frequency (RF) amplifiers that only use a few active devices, while CMOS technology offers high input impedance and is excellent for constructing large numbers of low-power logic gates. In a BiCMOS process the doping profile and other process features may be tilted to favour either the CMOS or the bipolar devices. For example GlobalFoundries offer a basic 180 nm BiCMOS7WL process and several other BiCMOS processes optimized in various ways.[3] These processes also include steps for the deposition of precision resistors, and high Q RF inductors and capacitors on-chip, which are not needed in a "pure" CMOS logic design.
The SuperSPARC, Pentium[4] and Pentium Pro microprocessors also used BiCMOS, but starting with Pentium II, designed with increasingly smaller (0.35μm) processes and operating at lower voltages, bipolar transistors ceased to offer performance advantages for this sort of application and were removed.[5]
Disadvantages
Template:Speculation section Some of the advantages of CMOS fabrication, for example very low cost in mass production, do not transfer directly to BiCMOS fabrication. An inherent difficulty arises from the fact that optimizing both the BJT and MOS components of the process is impossible without adding many extra fabrication steps and consequently increased process cost and reduced yield. Finally, in the area of high performance logic, BiCMOS may never offer as low a power consumption as a foundry process optimized for CMOS alone, due to the potential for higher standby leakage current.
References
- ↑ Puchner, H. (1996). "5.2 BiCMOS Process Technology". Advanced Process Modeling for VLSI Technology (PhD). Institut für Mikroelektronik, Technischen Universität Wien. TUW-101186.
- ↑ Puchner 1996, 5.2.1 BiCMOS Process Flow
- ↑ "High-performance SiGe BiCMOS solutions". Global Foundries. https://gf.com/sites/default/files/sige_hp_pb_2020-0212web.pdf.
- ↑ Hodson, Gerri, "Anatomy of Intel's Pentium Processor", Intel Corporation, Solutions, May/June 1993, Page 9
- ↑ Neil H. E. Weste; David Money Harris (2010). CMOS VLSI Design: A Circuits and Systems Perspective (4th ed.). p. 277.
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