Intel 80387SX
The Intel 80387SX (387SX or i387SX) is the math coprocessor, also called an FPU, for the Intel 80386SX microprocessor. Introduced in 1987,[1] it was used to perform floating-point arithmetic operations directly in hardware. The coprocessor was designed only to work with the 386SX, rather than the standard 386DX. This was because the original 80387 could not communicate with the altered 16 bit data bus of the 386SX, which was modified from the original 386DX's 32 bit data bus. The 387SX uses a 68-pin PLCC socket, just like some variants of the 80286 and the less common 80186 CPU, and was made in speeds ranging from 16 MHz to 33 MHz, matching the clock speed range of the Intel manufactured 386SX. Some chips like the IIT 3C87SX could get up to 40 MHz, matching the clock speeds of the fastest 386SX CPUs.
With the 386SX/387SX combination, it provides three to five times the floating-point performance compared to these 80286/80287 combination.[2]
References
- ↑ Moran, Tom (1987-02-16). "Chips to Improve Performance Of 386 Machines, Intel Says" (in en-us). InfoWorld 9 (7): 5. ISSN 0199-6649. https://books.google.com/books?id=0DAEAAAAMBAJ&pg=PA5.
- ↑ Lewnes, Ann, "Welcome 80386SX", Microcomputer Solutions, September/October 1988, page 2
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