Engineering:Apple-designed processors

From HandWiki
Short description: Processor chips designed by Apple Inc. for use in their product portfolio


Apple-designed processors, collectively marketed by Apple as Apple silicon,[1][2] are system on a chip (SoC) and system in a package (SiP) processors designed by Apple Inc., mainly using the ARM architecture. They are the basis of Apple's iPhone, iPad, and Apple Watch platforms, and of products such as the HomePod, iPod touch, Apple TV, and AirPods.

As of late 2020, Apple is in the process of moving away from Intel processors to Apple-designed processors for its Macintosh line of computers. This switch was announced at WWDC 2020 on June 22, 2020,[3][4] and the first of the ARM-based Macs, using the Apple M1 processor, were unveiled on November 10, 2020.

Apple outsources the chips' manufacture but fully controls their integration with the company's hardware and software. Johny Srouji is in charge of Apple's silicon design.[5]

Early series

Apple first used SoCs in early versions of the iPhone and iPod touch. They combine in one package a single ARM-based processing core (CPU), a graphics processing unit (GPU), and other electronics necessary for mobile computing.

The APL0098 (also 8900B[6] or S5L8900) is a package on package (PoP) system on a chip (SoC) that was introduced on June 29, 2007, at the launch of the original iPhone. It includes a 412 MHz single-core ARM11 CPU and a PowerVR MBX Lite GPU. It was manufactured by Samsung on a 90 nm process.[7] The iPhone 3G and the first-generation iPod touch also use it.[8]

The APL0278[9] (also S5L8720) is a PoP SoC introduced on September 9, 2008, at the launch of the second-generation iPod touch. It includes a 533 MHz single-core ARM11 CPU and a PowerVR MBX Lite GPU. It was manufactured by Samsung on a 65 nm process.[7][8]

The APL0298 (also S5L8920) is a PoP SoC introduced on June 8, 2009, at the launch of the iPhone 3GS. It includes a 600 MHz single-core Cortex-A8 CPU and a PowerVR SGX535 GPU. It was manufactured by Samsung on a 65 nm process.[10]

The APL2298 (also S5L8922) is a 45 nm die shrunk version of the iPhone 3GS SoC[7] and was introduced on September 9, 2009, at the launch of the third-generation iPod touch.

A series

The Apple "A" series is a family of SoCs used in certain models of the iPhone, iPad other than the fifth generation iPad Pro, iPod touch, and the Apple TV digital media player. They integrate one or more ARM-based processing cores (CPU), a graphics processing unit (GPU), cache memory and other electronics necessary to provide mobile computing functions within a single physical package.[11]

Apple A4

Main page: Engineering:Apple A4

The Apple A4 is a PoP SoC manufactured by Samsung, the first SoC Apple designed in-house.[12] It combines an ARM Cortex-A8 CPU – also used in Samsung's S5PC110A01 SoC[13][14] – and a PowerVR SGX 535 graphics processor (GPU),[15][16][17] all built on Samsung's 45-nanometer silicon chip fabrication process.[7][18] The design emphasizes power efficiency.[19] The A4 commercially debuted in 2010, in Apple's iPad tablet,[15] and was later used in the iPhone 4 smartphone,[20] the 4th-generation iPod touch, and the 2nd-generation Apple TV.[21]

The Cortex-A8 core used in the A4, dubbed "Hummingbird", is thought to use performance improvements developed by Samsung in collaboration with chip designer Intrinsity, which was subsequently acquired by Apple[22][23] It can run at far higher clock rates than other Cortex-A8 designs yet remains fully compatible with the design provided by ARM.[24] The A4 runs at different speeds in different products: 1 GHz in the first iPads,[25] 800 MHz in the iPhone 4 and 4th-generation iPod touch, and an undisclosed speed in the 2nd-generation Apple TV.

The A4's SGX535 GPU could theoretically push 35 million polygons per second and 500 million pixels per second, although real-world performance may be considerably less.[26] Other performance improvements include additional L2 cache.

The A4 processor package does not contain RAM, but supports PoP installation. The 1st-generation iPad, 4th-generation iPod touch,[27] and the 2nd-generation Apple TV[28] have an A4 mounted with two low-power 128 MB DDR SDRAM chips (totaling 256 MB), while the iPhone 4 has two 256 MB packages for a total of 512 MB.[29][30][31] The RAM is connected to the processor using ARM's 64-bit-wide AMBA 3 AXI bus. To give the iPad high graphics bandwidth, the width of the RAM data bus is double that used in previous ARM11- and ARM9-based Apple devices.[32]

Apple A5

Main page: Engineering:Apple A5

The Apple A5 is an SoC manufactured by Samsung[33] that replaced the A4. The chip commercially debuted with the release of Apple's iPad 2 tablet in March 2011,[34] followed by its release in the iPhone 4S smartphone later that year. Compared to the A4, the A5 CPU "can do twice the work" and the GPU has "up to nine times the graphics performance",[35] according to Apple.

The A5 contains a dual-core ARM Cortex-A9 CPU[36] with ARM's advanced SIMD extension, marketed as NEON, and a dual core PowerVR SGX543MP2 GPU. This GPU can push between 70 and 80 million polygons/second and has a pixel fill rate of 2 billion pixels/second. The iPad 2's technical specifications page says the A5 is clocked at 1 GHz,[37] though it can adjust its frequency to save battery life.[36][38] The clock speed of the unit used in the iPhone 4S is 800 MHz. Like the A4, the A5 process size is 45 nm.[39]

An updated 32 nm version of the A5 processor was used in the 3rd-generation Apple TV, the iPod touch (5th generation), the iPad Mini, and the new version of iPad 2 (version iPad2,4).[40] The chip in the Apple TV has one core locked.[41][42] Markings on the square package indicate that it is named APL2498, and in software, the chip is called S5L8942. The 32 nm variant of the A5 provides around 15% better battery life during web browsing, 30% better when playing 3D games and about 20% better battery life during video playback.[43]

In March 2013, Apple released an updated version of the 3rd-generation Apple TV (Rev A, model A1469) containing a smaller, single-core version of the A5 processor. Unlike the other A5 variants, this version of the A5 is not a PoP, having no stacked RAM. The chip is very small, just 6.1×6.2 mm, but as the decrease in size is not due to a decrease in feature size (it is still on a 32 nm fabrication process), this indicates that this A5 revision is of a new design.[44] Markings tell that it is named APL7498, and in software, the chip is called S5L8947.[45][46]

Apple A5X

Main page: Engineering:Apple A5X

The Apple A5X is an SoC announced on March 7, 2012, at the launch of the third-generation iPad. It is a high-performance variant of the Apple A5; Apple claims it has twice the graphics performance of the A5.[47] It was superseded in the fourth-generation iPad by the Apple A6X processor.

The A5X has a quad-core graphics unit (PowerVR SGX543MP4) instead of the previous dual-core as well as a quad-channel memory controller that provides a memory bandwidth of 12.8 GB/s, roughly three times more than in the A5. The added graphics cores and extra memory channels add up to a very large die size of 165 mm²,[48] for example twice the size of Nvidia Tegra 3.[49] This is mainly due to the large PowerVR SGX543MP4 GPU. The clock frequency of the dual ARM Cortex-A9 cores have been shown to operate at the same 1 GHz frequency as in A5.[50] The RAM in A5X is separate from the main CPU package.[51]

Apple A6

Main page: Engineering:Apple A6

The Apple A6 is a PoP SoC introduced on September 12, 2012, at the launch of the iPhone 5, then a year later was inherited by its minor successor the iPhone 5C. Apple states that it is up to twice as fast and has up to twice the graphics power compared to its predecessor the Apple A5.[52] It is 22% smaller and draws less power than the 45 nm A5.[53]

The A6 is said to use a 1.3 GHz[54] custom[55] Apple-designed ARMv7 based dual-core CPU, called Swift,[56] rather than a licensed CPU from ARM like in previous designs, and an integrated 266 MHz triple-core PowerVR SGX 543MP3[57] graphics processing unit (GPU). The Swift core in the A6 uses a new tweaked instruction set, ARMv7s, featuring some elements of the ARM Cortex-A15 such as support for the Advanced SIMD v2, and VFPv4.[55] The A6 is manufactured by Samsung on a high-κ metal gate (HKMG) 32 nm process.[58]

Apple A6X

Main page: Engineering:Apple A6X

Apple A6X is an SoC introduced at the launch of the fourth-generation iPad on October 23, 2012. It is a high-performance variant of the Apple A6. Apple claims the A6X has twice the CPU performance and up to twice the graphics performance of its predecessor, the Apple A5X.[59]

Like the A6, this SoC continues to use the dual-core Swift CPU, but it has a new quad core GPU, quad channel memory and slightly higher 1.4 GHz CPU clock rate.[60] It uses an integrated quad-core PowerVR SGX 554MP4 graphics processing unit (GPU) running at 300 MHz and a quad-channel memory subsystem.[60][61] Compared to the A6 the A6X is 30% larger, but it continues to be manufactured by Samsung on a high-κ metal gate (HKMG) 32 nm process.[61]

Apple A7

Main page: Engineering:Apple A7

The Apple A7 is a 64-bit PoP SoC whose first appearance was in the iPhone 5S, which was introduced on September 10, 2013. The chip would also be used in the iPad Air, iPad Mini 2 and iPad Mini 3. Apple states that it is up to twice as fast and has up to twice the graphics power compared to its predecessor the Apple A6.[62] The Apple A7 chip is the first 64-bit chip to be used in a smartphone.[63]

The A7 features an Apple-designed 1.3[64]–1.4[65] GHz 64-bit[66] ARMv8-A[67][68] dual-core CPU,[64] called Cyclone,[67] and an integrated PowerVR G6430 GPU in a four cluster configuration.[69] The ARMv8-A architecture doubles the number of registers of the A7 compared to the A6.[70] It now has 31 general-purpose registers that are each 64-bits wide and 32 floating-point/NEON registers that are each 128-bits wide.[66] The A7 is manufactured by Samsung on a high-κ metal gate (HKMG) 28 nm process[71] and the chip includes over 1 billion transistors on a die 102 mm2 in size.[64]

Apple A8

Main page: Engineering:Apple A8

The Apple A8 is a 64-bit PoP SoC manufactured by TSMC. Its first appearance was in the iPhone 6 and iPhone 6 Plus, which were introduced on September 9, 2014.[72] A year later it would drive the iPad Mini 4. Apple states that it has 25% more CPU performance and 50% more graphics performance while drawing only 50% of the power compared to its predecessor, the Apple A7.[73] On February 9, 2018 Apple released the HomePod, which is powered by an Apple A8 with 1 GB of RAM.[74]

The A8 features an Apple-designed 1.4[75] GHz 64-bit[76] ARMv8-A[76] dual-core CPU, and an integrated custom PowerVR GX6450 GPU in a four cluster configuration.[75] The GPU features custom shader cores and compiler.[77] The A8 is manufactured on a 20 nm process[78] by TSMC,[79] which replaced Samsung as the manufacturer of Apple's mobile device processors. It contains 2 billion transistors. Despite that being double the number of transistors compared to the A7, its physical size has been reduced by 13% to 89 mm2 (consistent with a shrink only, not known to be a new microarchitecture).[80]

Apple A8X

Main page: Engineering:Apple A8X

The Apple A8X is a 64-bit SoC introduced at the launch of the iPad Air 2 on October 16, 2014.[81] It is a high performance variant of the Apple A8. Apple states that it has 40% more CPU performance and 2.5 times the graphics performance of its predecessor, the Apple A7.[81][82]

Unlike the A8, this SoC uses a triple-core CPU, a new octa-core GPU, dual channel memory and slightly higher 1.5 GHz CPU clock rate.[83] It uses an integrated custom octa-core PowerVR GXA6850 graphics processing unit (GPU) running at 450 MHz and a dual-channel memory subsystem.[83] It is manufactured by TSMC on their 20 nm fabrication process, and consists of 3 billion transistors.

Apple A9

Main page: Engineering:Apple A9

The Apple A9 is a 64-bit ARM-based SoC that first appeared in the iPhone 6S and 6S Plus, which were introduced on September 9, 2015.[84] Apple states that it has 70% more CPU performance and 90% more graphics performance compared to its predecessor, the Apple A8.[84] It is dual sourced, a first for an Apple SoC; it is manufactured by Samsung on their 14 nm FinFET LPE process and by TSMC on their 16 nm FinFET process. It was subsequently included in the first-generation iPhone SE, and the iPad (2017). The Apple A9 was the last CPU that Apple manufactured through a contract with Samsung, as all A-series chips after are manufactured by TSMC.

Apple A9X

Main page: Engineering:Apple A9X

The Apple A9X is a 64-bit SoC that was announced on September 9, 2015, and released on November 11, 2015, and first appeared in the iPad Pro.[85] It offers 80% more CPU performance and two times the GPU performance of its predecessor, the Apple A8X. It is manufactured by TSMC using a 16 nm FinFET process.[86]

Apple A10 Fusion

Main page: Engineering:Apple A10

The Apple A10 Fusion is a 64-bit ARM-based SoC that first appeared in the iPhone 7 and 7 Plus, which were introduced on September 7, 2016.[87] The A10 is also featured in the 2018 iPad, 2019 iPad and 7th generation iPod Touch.[88] It has a new ARM big.LITTLE quad core design with two high performance cores, and two smaller highly efficient cores. It is 40% faster than the A9, with 50% faster graphics. It is manufactured by TSMC on their 16 nm FinFET process.

Apple A10X Fusion

Main page: Engineering:Apple A10X

The Apple A10X Fusion is a 64-bit ARM-based SoC that first appeared in the 10.5" iPad Pro and the second generation of the 12.9" iPad Pro, which were both announced on June 5, 2017.[89] It is a variant of the A10 and Apple claims that it has 30 percent faster CPU performance and 40 percent faster GPU performance than its predecessor, the A9X.[89] On September 12, 2017, Apple announced that the Apple TV 4K would be powered by an A10X chip. It is made by TSMC on their 10 nm FinFET process.[90]

Apple A11 Bionic

Main page: Engineering:Apple A11

The Apple A11 Bionic is a 64-bit ARM-based SoC[91] that first appeared in the iPhone 8, iPhone 8 Plus, and iPhone X, which were introduced on September 12, 2017.[91] It has two high-performance cores, which are 25% faster than the A10 Fusion, and four high-efficiency cores, which are 70% faster than the energy-efficient cores in the A10.[91][92] It is also the first A-series chip to feature Apple's "Neural Engine," which enhances artificial intelligence and machine learning processes.[93]

Apple A12 Bionic

Main page: Engineering:Apple A12

The Apple A12 Bionic is a 64-bit ARM-based SoC that first appeared in the iPhone XS, XS Max and XR, which were introduced on September 12, 2018. It is also used in the 2019 models of the iPad Air and iPad Mini and the 2020 model of the iPad. It has two high-performance cores, which are 15% faster than the A11 Bionic, and four high-efficiency cores, which have 50% lower power usage than the energy-efficient cores in the A11 Bionic.[94] The A12 is manufactured by TSMC[95] using a 7 nm[96] FinFET process, the first to ship in a smartphone.[97][95] It is also used in the 6th generation Apple TV.

Apple A12X Bionic

Main page: Engineering:Apple A12X

The Apple A12X Bionic is a 64-bit ARM-based SoC that first appeared in the 11.0" iPad Pro and the third generation of the 12.9" iPad Pro, which were both announced on October 30, 2018.[98] It offers 35% faster single-core and 90% faster multi-core CPU performance than its predecessor, the A10X. It has four high-performance cores and four high-efficiency cores. The A12X is manufactured by TSMC using a 7 nm FinFET process.

Apple A12Z Bionic

Main page: Engineering:Apple A12Z

The Apple A12Z Bionic is a 64-bit ARM-based SoC based on the A12X that first appeared in the fourth generation iPad Pro, which was announced on March 18, 2020.[99] The A12Z is also used in the Developer Transition Kit prototype computer that helps developers prepare their software for Macs based on Apple silicon.[100]

Apple A13 Bionic

The Apple A13 Bionic is a 64-bit ARM-based SoC that first appeared in the iPhone 11, 11 Pro, and 11 Pro Max, which were introduced on September 10, 2019. It is also featured in the second-generation iPhone SE, which was introduced on April 15, 2020.

The entire A13 Bionic SoC features a total of 18 cores – a six-core CPU, four-core GPU, and an eight-core Neural Engine processor, which is dedicated to handling on-board machine learning processes; four of the six cores on the CPU are low-powered cores that are dedicated to handling less CPU-intensive operations, such as voice calls, browsing the Web, and sending messages, while two higher-performance cores are used only for more CPU-intensive processes, such as recording 4K video or playing a video game.[101]

Apple A14 Bionic

The Apple A14 Bionic is a 64-bit ARM-based SoC that first appeared in the 2020 iPad Air and iPhone 12, released on October 23, 2020. It is the first commercially available 5 nm chipset and it contains 11.8 billion transistors and a 16-core AI processor.[102] It includes Samsung LPDDR4X DRAM, a 6-core CPU, and 4-Core GPU with real time machine learning capabilities.

S series

The Apple "S" series is a family of Systems in a Package (SiP) used in the Apple Watch. It uses a customized application processor that together with memory, storage and support processors for wireless connectivity, sensors and I/O comprise a complete computer in a single package. They are designed by Apple and manufactured by contract manufacturers such as Samsung.

Apple S1

The Apple S1 is an integrated computer. It includes memory, storage and support circuits like wireless modems and I/O controllers in a sealed integrated package. It was announced on September 9, 2014 as part of the "Wish we could say more" event. Its first appearance was in the original Apple Watch.[103]

Apple S1P

Used in Apple Watch Series 1. It has a dual-core processor almost identical to the S2, with the exception of the built-in GPS receiver.

Apple S2

Used in the Apple Watch Series 2. It has a dual-core processor and a built-in GPS receiver.

Apple S3

Used in the Apple Watch Series 3. It has a dual-core processor that is 70% faster than the Apple S2 and a built-in GPS receiver.[104] There is also an option for a cellular modem and an internal eSIM module.[104] It also includes the W2 chip.[104]

Apple S4

Used in the Apple Watch Series 4. It has a custom 64-bit dual-core processor with up to 2× faster performance. It also contains the W3 wireless chip, which supports Bluetooth 5.

Apple S5

Used in the Apple Watch Series 5, Apple Watch SE, and HomePod mini.[105] It adds a built-in magnetometer to the custom 64-bit dual-core processor and GPU of the S4.[106]

Apple S6

Used in the Apple Watch Series 6. It has a custom 64-bit dual-core processor that runs up to 20 percent faster than the S5.[107][108] The dual cores in the S6 are based on the A13's energy-efficient "little" Thunder cores at 1.8 GHz [109]. Like the S4 and S5, it also contains the W3 wireless chip.[108] The S6 adds the new U1 ultra wideband chip, an always-on altimeter, and 5 GHz WiFi.[107][108]

T series

Apple T1

The Apple T1 chip is an ARMv7 SoC (derived from the processor in S2 SiP) that drives the System Management Controller (SMC) and Touch ID sensor of the 2016 and 2017 MacBook Pro with Touch Bar.[110] This chip operates as a secure enclave for processing and encrypting fingerprints and as a gatekeeper that to the microphone and FaceTime HD camera, protecting them from hacking. The T1 runs bridgeOS,[111] a variant of watchOS;[111] while the Intel CPU runs macOS.[111]

Apple T2

The Apple T2 Security Chip is a SoC first released in the iMac Pro 2017. It is a 64-bit ARMv8 chip (a variant of the A10, or T8010), and runs bridgeOS 2.0.[112][113] It provides a secure enclave for encrypted keys, enables users to lock down the computer's boot process, handles system functions like the camera and audio control, and handles on-the-fly encryption and decryption for the solid-state drive.[114][115][116] T2 also delivers "enhanced imaging processing" for the iMac Pro's FaceTime HD camera.[117][118] On July 12, 2018, Apple released an updated MacBook Pro that includes the T2 chip, which among other things enables the "Hey Siri" feature.[119][120] On November 7, 2018, Apple released an updated Mac mini and MacBook Air with the T2 chip.[121][122] On August 4, 2020, a refresh of the 5K iMac was announced, including the T2 chip.[123]

On October 6, 2020, Apple announced that a hardware flaw in the chip's security features might be exploited in a way that cannot be patched, using a similar method as the jailbreaking of the iPhone with A10 chip, since the T2 chip is based on the A10 chip. Apple was notified of this vulnerability but chose not to respond before security researchers publicly disclosed the vulnerability.[124] It was later discovered by YouTuber Martin Nobel that this vulnerability can allow users to implement custom Mac startup sounds.[125][126]

W series

The Apple "W" series is a family of SoCs and wireless chips with a focus on Bluetooth and Wi-Fi connectivity. "W" in model numbers stands for wireless.

Apple W1

The Apple W1 is a SoC used in the 2016 AirPods and select Beats headphones.[127][128] It maintains a Bluetooth[129] Class 1 connection with a computer device and decodes the audio stream that is sent to it.[130]

Apple W2

The Apple W2, used in the Apple Watch Series 3, is integrated into the Apple S3 SiP. Apple said the chip makes Wi-Fi 85% faster and allows Bluetooth and Wi-Fi to use half the power of the W1 implementation.[104]

Apple W3

The Apple W3 is used in the Apple Watch Series 4,[131] Series 5,[132] Series 6.[108] and SE.[108] It is integrated into the Apple S4, S5, and S6 SiPs. It supports Bluetooth 5.0.

H series

The Apple "H" series is a family of SoCs used in headphones. "H" in model numbers stands for headphones.

Apple H1

The Apple H1 chip was first used in the 2019 version of AirPods, and was later used in the Powerbeats Pro, the Beats Solo Pro, the AirPods Pro, the 2020 Powerbeats, and the AirPods Max.[133] Specifically designed for headphones, it has Bluetooth 5.0, supports hands-free "Hey Siri" commands,[134] and offers 30 percent lower latency than the W1 chip used in earlier AirPods.[135]

U series

The Apple "U" series is a family of Systems in a Package (SiP) implementing ultra-wideband radio.

Apple U1

The Apple U1 is used in the iPhone 11 and later (excluding the second generation iPhone SE), the Apple Watch Series 6, the HomePod mini and AirTag trackers.[136]

M series

The Apple "M" series is a family of Systems in a Package (SiP) used in Mac computers and iPad Pro tablets. The "M" designation was previously used for Apple motion coprocessors.

Apple M1

Main page: Engineering:Apple M1

The M1 chip, Apple's first processor designed for use in Macs, is manufactured using TSMC's 5 nm process. It was announced on November 10, 2020, and is used in the M1 MacBook Air, M1 Mac mini, MacBook Pro (2020), M1 iMac, and 5th generation iPad Pro.[137]

Miscellaneous devices

This segment is about a variety of Apple designed processors, not easily sorted into another section.

The 339S0196 is a ARM-based microcontroller used in Apple's Lightning Digital AV Adapter, a Lightning to HDMI adapter. This is a miniature computer with 256 MB RAM, running an XNU kernel loaded from the connected iOS device, then taking a serial signal from the iOS device translating that into a proper HDMI signal.[138][139]

List of Apple processors

A series list

Name Model
no.
Image Semiconductor technology Die
size
Transistor count CPU ISA CPU CPU
cache
GPU FLOPS
FP32/FP16
AI accelerator Memory
technology
First Released Utilizing
devices
Initial OS Terminal OS
Memory
bandwidth
APL
0098
S5L8900.jpg 90 nm[10] 72 
mm2
[7]
ARMv6 412 MHz single-core ARM11 L1i: 16 KB
L1d: 16 KB
PowerVR MBX Lite @ 60-103 MHz (1 EU, 8 ALUs) (0.96 - 1.64  GFLOPS) N/A LPDDR-266 Single-channel 16-bit @ 133 MHz (533 MB/s)[140] June 29, 2007 iPhone OS 1.0 iPhone OS 3.1.3
iOS 4.2.1
APL
0278
S5L8720.jpg 65 nm[7][10] 36 
mm2
[7]
412–533 MHz single-core ARM11 PowerVR MBX Lite @ 103-133 MHz (1 EU, 8 ALUs) (1.64 - 2.12 GFLOPS) LPDDR-266 Single-channel 32-bit @ 133 MHz (1066 MB/s) September 9, 2008 iPhone OS 2.1.1
APL
0298
Apple SoC S5L8920.jpg 71.8 
mm2
[18]
ARMv7 600 MHz single-core Cortex-A8 L1i: 32 KB
L1d: 32 KB
L2: 256 KB
PowerVR SGX535 @ 200 MHz (2 EUs, 16 ALUs) (6.4 GFLOPS) LPDDR-400 Single-channel 32-bit @ 200 MHz (1.6 GB/s) June 19, 2009 iPhone OS 3.0 iOS 6.1.6
APL
2298
S5L8922.jpg 45 nm[7][18][39] 41.6 
mm2
[7]
600–800 MHz single-core Cortex-A8 September 9, 2009 iPhone OS 3.1.1 iOS 5.1.1
A4 APL
0398
Apple A4 Chip.jpg 53.3 
mm2
[7][18]
0.8–1.0 GHz single-core Cortex-A8 L1i: 32 KB
L1d: 32 KB
L2: 512 KB
PowerVR SGX535 @ 200-250 MHz (2 EUs, 16 ALUs) (6.4-8.0 GFLOPS)[141] LPDDR-400 Dual-channel 32-bit (64-bit) @ 200 MHz (3.2 GB/s) April 3, 2010 iPhone OS 3.2 iOS 5.1.1
iOS 6.1.6
iOS 7.1.2
A5 APL
0498
Apple A5 Chip.jpg 122.2 
mm2
[39]
0.8–1.0 GHz dual-core Cortex-A9 L1i: 32 KB
L1d: 32 KB
L2: 1 MB[142]
PowerVR SGX543MP2  (dual-core) @ 200 MHz (4 EUs, 32 ALUs) (12.8 GFLOPS)[143] LPDDR2-800 Dual-channel 32-bit (64-bit) @ 400 MHz (6.4 GB/s) March 11, 2011 iOS 4.3 iOS 9.3.5
iOS 9.3.6
APL
2498
Apple-A5-APL2498.jpg 32 nm MG[40][46] 69.6 
mm2
[40]
0.8–1.0 GHz dual-core Cortex-A9 (one core locked in Apple TV) March 7, 2012 iOS 5.1
APL
7498
Apple-A5-APL7498.jpg 37.8 
mm2
[46]
1.0 GHz Single-core Cortex-A9 (single-core redesign from A5 dual-core) January 28, 2013 iOS 6.1 iOS 8.4.6
A5X APL
5498
Apple A5X Chip.jpg 45 nm[48] 165 
mm2
[48]
1.0 GHz dual-core Cortex-A9 PowerVR SGX543MP4 (quad-core) @ 200 MHz (8 EUs, 64 ALUs) (25.6 GFLOPS)[143] LPDDR2-800 Quad-channel 32-bit (128-bit) @ 400 MHz (12.8 GB/s)[144] March 16, 2012 iOS 5.1 iOS 9.3.5
iOS 9.3.6
A6 APL
0598
Apple A6 Chip.jpg 32 nm MG[58][145][61] 96.71 
mm2
[58][145]
ARMv7s [146] 1.3 GHz[147] dual-core Swift[55] PowerVR SGX543MP3 (triple-core) @ 266 MHz (16 EUs, 128 ALUs) (68.0 GFLOPS)[57] September 21, 2012 iOS 6.0 iOS 10.3.3
iOS 10.3.4
A6X APL
5598
Apple A6X chip.jpg 123 
mm2
[61]
1.4 GHz dual-core Swift[60] PowerVR SGX554MP4 (quad-core) @ 300 MHz (16 EUs, 128 ALUs)[60] [148](76.8 GFLOPS) LPDDR2-1066 Quad-channel 32-bit (128-bit) @ 533 MHz (17.1 GB/s)[149] November 2, 2012
A7 APL
0698
Apple A7 chip.jpg 28 nm MG[71][150] 102 
mm2
[66][150]
≈1 billion ARMv8.0-A [67][75] 1.3 GHz[64] dual-core Cyclone[67] L1i: 64 KB
L1d: 64 KB
L2: 1 MB
L3: 4 MB (Inclusive) [67][151][65]
PowerVR G6430 (quad-core) @ 450  MHz (16 EUs, 128 ALUs)[69][148] (115.2  GFLOPS) LPDDR3-1600 Single-channel 64-bit[76][152] @ 800 MHz (12.8 GB/s) September 20, 2013 iOS 7.0 iOS 12.5.1
APL
5698
Apple A7 S5L9865 chip.jpg 1.4 GHz[65] dual-core Cyclone[67] November 1, 2013 iOS 7.0.3
A8 APL
1011
Apple A8 system-on-a-chip.jpg 20 nm (TSMC)[76][75] 89 
mm2
[153][83]
[154]
~2 billion 1.1–1.5 GHz dual-core Typhoon[75][155] Customized PowerVR GXA6450 (quad-core) @ 533 MHz (16 EUs, 128 ALUs)[77][156][157] (136.4 GFLOPS) September 19, 2014 iOS 8.0

tvOS 9.0

iOS 12.5.1


Current

A8X APL
1012
Apple A8X system-on-a-chip.jpg 128 
mm2
[83]
~3 billion 1.5 GHz triple-core[83][155] Typhoon L1i: 64 KB
L1d: 64 KB
L2: 2 MB
L3: 4 MB[83] (Inclusive)[151]
Customized PowerVR GXA6850 (octa-core) @ 450 MHz (32 EUs, 256 ALUs)[77][83][154] (230.4 GFLOPS) LPDDR3-1600 Dual-channel 64-bit (128-bit) @ 800 MHz[83] (25.6 GB/s)[152] October 22, 2014 iOS 8.1 Current
A9 APL
0898
Apple A9 APL0898.jpg 14 nm FinFET (Samsung)[158] 96 
mm2
[159]
>2 billion 1.85 GHz dual-core [160][161] Twister L1i: 64 KB
L1d: 64 KB
L2: 3 MB
L3: 4 MB (Victim)

[151][162]

Customized PowerVR GT7600 (hexa-core) @ 650 MHz (24 EUs, 192 ALUs)[77][163](249.6 GFLOPS) LPDDR4-3200 Single-channel 64-bit[161][162] @ 1600 MHz (25.6 GB/s) September 25, 2015 iOS 9.0 Current
APL
1022
Apple A9 APL1022.jpg 16 nm FinFET (TSMC)[159] [164][165] 104.5 
mm2
[159]
A9X APL
1021
Apple A9X.jpg 143.9 
mm2
[164][90]
>3 billion 2.16–2.26 GHz dual-core Twister[166][167] L1i: 64 KB
L1d: 64 KB
L2: 3 MB
L3: none [151][164]
Customized PowerVR GTA7850 (12-core) @ 650 MHz (48 EUs, 384 ALUs)[77][164](499.2 GFLOPS) LPDDR4-3200 Dual-channel 64-bit (128-bit) @ 1600 MHz (51.2 GB/s) November 11, 2015 iOS 9.1 Current
A10 Fusion APL
1W24
Apple A10 Fusion APL1W24.jpg 125 
mm2
[165]
3.3 billion ARMv8.1-A 2.34 GHz (2× Hurricane) + 1.092 GHz (2× Zephyr) (quad-core overall)[168] L1i: 64 KB
L1d: 64 KB
L2: 3 MB
L3: 4 MB
Customized PowerVR GT7600 Plus (hexa-core) @ 900 MHz (24 EUs, 192 ALUs)[169][77](345.6 GFLOPS)[170][171] LPDDR4-3200 Single-channel 64-bit @ 1600 MHz (25.6 GB/s) September 16, 2016 iOS 10.0 Current
A10X Fusion APL
1071
[172]
Apple A10X Fusion.jpg 10 nm FinFET (TSMC)[90] 96.4 
mm2
[90]
>4 billion 2.36 GHz (3× Hurricane) + ?.?? GHz (3× Zephyr) (hexa-core overall)[173] L1i: 64 KB
L1d: 64 KB
L2: 8 MB
L3: none [173][174]
Customized PowerVR GT7600 Plus(12-core) [77][89]@ 1000 MHz (48 EUs, 384 ALUs) (768.0 GFLOPS) LPDDR4-3200 Dual-channel 64-bit (128-bit) @ 1600 MHz (51.2 GB/s)[172] [173] June 13, 2017 iOS 10.3.2

tvOS 11.0

Current
A11 Bionic APL
1W72
Apple A11.jpg 87.66 
mm2
[175]
4.3 billion ARMv8.2-A [176] 2.39 GHz (2× Monsoon) + 1.19 GHz (4× Mistral) (hexa-core overall) Apple-designed (triple-core) @ 1066 MHz (24 EUs, 192 ALUs) (409.3 GFLOPS) Neural Engine (dual-core) 600 GOPS (billion operations/s) LPDDR4X-4266 Single-channel 64-bit @ 2133 MHz (34.1 GB/s)[177] [178][179][180][181] September 22, 2017 iOS 11.0 Current
A12 Bionic APL
1W81
Apple A12.jpg 7 nm FinFET (TSMC N7) 83.27 
mm2
[182]
6.9 billion ARMv8.3-A [183] up to 2.49 GHz (2× Vortex) + up to 1.59 GHz (4× Tempest) (hexa-core overall)[179] L1i: 128 KB
L1d: 128 KB
L2: 8 MB
L3: none
Apple-designed (quad-core) @ 1125 MHz (32 EUs, 256 ALUs) (576.0 GFLOPS) Neural Engine (octa-core) 5 TOPS September 21, 2018 iOS 12.0 Current
A12X Bionic APL
1083
Apple A12X.jpg ≈135 
mm2
[184]
10 billion up to 2.49 GHz (4× Vortex) + up to 1.59 GHz (4× Tempest) (octa-core overall) Apple-designed (hepta-core) @ 1340 MHz (56 EUs, 448 ALUs) (1200.6 GFLOPS) LPDDR4X-4266 Dual-channel 64-bit (128-bit) @ 2133 MHz (68.2 GB/s) November 7, 2018 iOS 12.1 Current
A12Z Bionic Apple A12Z.jpg Apple-designed (octa-core) @ 1340 MHz (64 EUs, 512 ALUs) (1350.7 GFLOPS) March 25, 2020 iPadOS 13.4 Current
June 22, 2020
  • Developer Transition Kit
macOS Big Sur 11.0 Beta 1 macOS Big Sur 11.3 Beta 2
A13 Bionic APL
1W85
Apple A13 Bionic.jpg 7 nm FinFET (TSMC N7P) 98.48 
mm2
[185]
8.5 billion ARMv8.4-A [186] up to 2.65 GHz (2x Lightning) + up to 1.8 GHz (4x Thunder) (hexa-core overall) Apple-designed (quad-core) @ 1350 MHz (32 EUs, 256 ALUs)[187] (691.2 GFLOPS) Neural Engine (octa-core) + AMX blocks (dual-core) 5.5 TOPS LPDDR4X-4266 Single-channel 64-bit [188] @ 2677 MHz (42.8 GB/s) September 20, 2019 iOS 13.0 Current
A14 Bionic APL
1W01
Apple A14.jpg 5 nm FinFET (TSMC N5) 88
mm2
[189]
11.8 billion ARMv8.5-A up to 3.1 GHz (2x Firestorm) + up to 1.823 GHz (4x Icestorm) (hexa-core overall)[190][191]

L1i: 192 KB
L1d: 128 KB
L2: 8 MB
(shared for performance cores)

L2: 4 MB (shared for efficient cores)
L3: none

Apple-designed (quad-core) @ 975 MHz (64 EUs, 512 ALUs)[192][193](998.4 GFLOPS)[194] [195] Neural Engine (16-core) 11 TOPS October 23, 2020
  • iPad Air (4th generation)
  • iPhone 12
  • iPhone 12 mini
  • iPhone 12 Pro
  • iPhone 12 Pro Max
iOS 14.0 Current
Name Model
no.
Image Semiconductor technology Die size Transistor count CPU ISA CPU CPU
cache
GPU FLOPS
FP32/FP16
AI accelerator Memory
bandwidth
First Released Utilizing
devices
Initial OS Terminal OS
Memory
technology

S series list

Name Model
no.
Image Semiconductor technology Die size CPU ISA CPU CPU cache GPU FLOPS
FP32/FP16
Memory
technology
Modem First Released Utilizing
devices
Initial OS Terminal OS
Memory
bandwidth
S1 APL
0778
[196]
Apple S1 module.png 28 nm MG[197][198] 32 mm2[197] ARMv7k[198][199] 520 MHz single-core Cortex-A7[198] L1d: 32 KB[198]
L2: 256 KB[198]
PowerVR Series 5[198][200] LPDDR3[201] April 2015 watchOS 1.0 watchOS 4.3.2
S1P TBC Apple S1P module.png TBC TBC ARMv7k[202][203][204] 520 MHz dual-core Cortex-A7 without GPS[202] TBC PowerVR Series 6 'Rogue'[202] LPDDR3 September 2016 watchOS 3.0 watchOS 6.3
S2 TBC Apple S2 module.png TBC TBC TBC
S3 TBC Apple S3 module.png TBC TBC ARMv7k[205] Dual-core TBC TBC LPDDR4 Qualcomm MDM9635M (Snapdragon X7 LTE) September 2017 watchOS 4.0 Current
S4 TBC Apple S4 module.png TSMC 7nm TBC ARMv8-A ILP32[206][207] Dual-core Tempest TBC Apple G11M[207] TBC TBC September 2018 watchOS 5.0 Current
S5 TBC Apple S5 module.png TBC ARMv8-A ILP32 TBC Apple G11M TBC TBC September 2019 watchOS 6.0 Current
S6 TBC Apple S6 module.png TBC TBC 1.8 GHz Dual-core Thunder TBC TBC TBC TBC September 2020 watchOS 7.0 Current
Name Model no. Image Semiconductor technology Die size CPU ISA CPU CPU cache GPU FLOPS
FP32/FP16
Memory
bandwidth
Modem First Released Utilizing
devices
Initial OS Terminal OS
Memory
technology

T series list

Name Model
no.
Image Semiconductor
technology
Die size CPU ISA CPU CPU cache GPU Memory
technology
First
Released
Utilizing
devices
Memory
bandwidth
T1 APL
1023
[208]
Apple T1 Processor ARMv7 TBD November
12, 2016
  • MacBook Pro (13-inch, 2016,
    Four Thunderbolt 3 ports)
  • MacBook Pro (15-inch, 2016)
  • MacBook Pro (13-inch, 2017,
    Four Thunderbolt 3 ports)
  • MacBook Pro (15-inch, 2017)
T2 APL
1027
[209]
Apple T2 Processor ARMv8-A TBD LPDDR4 December
14, 2017
  • iMac Pro 2017
  • iMac 27-inch (mid-2020)
  • MacBook Pro (13-inch, 2018,
    Four Thunderbolt 3 ports)
  • MacBook Pro (15-inch, 2018)
  • Mac mini (2018)
  • MacBook Air (2018)
  • MacBook Pro (15-inch, 2019)
  • MacBook Pro (13-inch, 2019)
  • MacBook Pro (13-inch, Early 2020)
  • MacBook Air (2019)
  • MacBook Pro (16-inch, 2019)
  • Mac Pro (2019)
  • MacBook Air (Early 2020)
Name Model
no.
Image Semiconductor
technology
Die size CPU ISA CPU CPU cache GPU Memory
bandwidth
First
Released
Utilizing
devices
Memory
technology

W series list

Name Model no. Image Semiconductor
technology
Die
size
CPU ISA CPU CPU cache Memory
technology
Bluetooth First
Released
Utilizing
devices
Memory
bandwidth
W1 343S00130[210]
343S00131[210]
Apple W1 chip TBC 14.3
 mm2
[210]
TBC TBC TBC TBC 4.2 December
13, 2016
  • AirPods (1st gen.)
  • Beats Solo3
  • Beats Studio3
  • Powerbeats3
  • BeatsX
  • Beats Flex
W2 338S00348[211] Apple W2 chip TBC TBC TBC TBC TBC TBC September
22, 2017
W3 338S00464[212] Apple W3 chip TBC TBC TBC TBC TBC TBC 5.0 September
21, 2018
Name Model no. Image Semiconductor
technology
Die
size
CPU ISA CPU CPU cache Memory
bandwidth
Bluetooth First
Released
Utilizing
devices
Memory
technology

H series list

Name Model no. Image Bluetooth First
Released
Utilizing
devices
H1 343S00289[213]
(AirPods gen.2)
343S00290[214]
(AirPods gen.2)
343S00404[215]
(AirPods Max)
H1 SiP[216]
(AirPods Pro)
Apple H1 chip 100px|Apple H1 chip 100px|Apple H1 chip
100px|Apple H1 SiP Apple H! SiP
5.0 March
20, 2019
  • AirPods (2nd gen.)
  • Powerbeats Pro
  • Beats Solo Pro[217]
  • AirPods Pro
  • Powerbeats (2020)
  • AirPods Max
Name Model no. Image Bluetooth First
Released
Utilizing
devices

U series list

Name Model
no.
Image CPU Semiconductor
technology
First
Released
Utilizing
devices
U1 TMK
A75
[218]
Apple U1 chip Cortex-M4
ARMv7E-M
[219]
16 nm FinFET
(TSMC 16FF)
September
20, 2019
Name Model
no.
Image CPU Semiconductor
technology
First
Released
Utilizing
devices

M series list

Name Model no. Image Semiconductor technology Die
size
Transistor count CPU ISA CPU CPU
cache
GPU FLOPS
FP32/FP16
AI accelerator Memory
technology
First Released Utilizing
devices
Initial OS Terminal OS
Memory
bandwidth
M1 APL
1102
Apple M1 processor 5 nm
(TSMC)
119 mm2
[220]
16 billion ARMv8.5-A 0.6-3.2 GHz
(4× Firestorm) + 0.6-2.064 GHz
(4× Icestorm)
(octa-core overall)
Performance Cores:
L1i: 192 kB L1d: 128 kB L2: 12 MB shared
Efficiency Cores: L1i:
128 kB L1d: 64 kB
L2: 4 MB shared
Apple-designed
(hepta-core) or
(octa-core) @
1278 MHz (128
EUs,1024 ALUs)
2.29 TFLOPs (7-
core) 2.61[220][221] TFLOPs (8-core)
16-core
(11 TOPS)
LPDDR4X
-4266 Dual-
channel
64-bit
(128-bit) @ 4266 MHz (68.2 GB/s)
November
17, 2020
MacBook Air (Late 2020)

MacBook Pro (Late 2020)
Mac Mini
(Late 2020)

iMac (Early 2021)
iPad Pro (Early 2021)

macOS
Big Sur

iPadOS 14

Current
Name Model no. Image Semiconductor technology Die
size
Transistor count CPU ISA CPU CPU
cache
GPU FLOPS
FP32/FP16
AI accelerator Memory
bandwidth
First Released Utilizing
devices
Initial OS Terminal OS
Memory
technology

Miscellaneous

Model no. Image First
Released
CPU ISA Specs Application Utilizing
devices
Operating
system
339S0196 339S0196 microcontroller March 2011 Arm 256 MB
RAM
Lightning to
HDMI conversion
Apple Digital
AV Adapter
XNU
Model
no.
Image First
Released
CPU ISA Specs Application Utilizing
devices
Operating
system

See also

Similar platforms

References

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Further reading